devfreq: Add CPUBW HW monitor governor
The CPUBW HW monitor devfreq governor uses the Krait L2 PM counters to determine the bandwidth needed by the Krait CPU subsystem. This governor can be used in conjunction with the CPUBW devfreq device to dynamically scale the DDR frequency based on the demand/actual usage from the Krait CPU subsystem. Since this governor uses the Krait L2 PM counters it can conflict with certain profiling tools. The Krait L2 performance monitor counters have the capability to count the no. of read/write transactions going out the master ports. They also have the capability to raise interrupts when they overflow. This driver uses those counters to determine the true usage of DDR from the Krait processor subsystem and then recommends CPU DDR BW votes based on the measured values and the following tunable parameters. The driver provides various tunables that allow it to be tuned more in favor of power or performance: - io_percent: The percentage of the CPU time that can be spent waiting on memory I/O. Lower value is better performance and worse power. - sample_ms: The sampling period in milliseconds. This only affects the sampling period when DDR use is ramping down or is increasing very slowly (See tolerance_percent). - tolerance_percent: The minimum increase in DDR use, compared to previous sample, that will trigger an IRQ to immediately bump up the bandwidth vote. It's expressed as a percentage of the previous sampled DDR use. - decay_rate: The parameter controls the rate at which the history is forgotten when ramping down. This is expressed as a percentage of history to be forgotten. So 100% means ignore history, 0% mean never forget the historical max. The default 90% means forget 90% of history each time. - guard_band_mbps: This is a margin that's added to the measured BW (and hence also the Bus BW votes) that's present to account for the time it takes to ramp up the DDR BW while the CPU continues to use the DDR. - bw_step: All BW votes are rounded up to multiples of bw_step. The default value is 200 MB/s that turns out to ~25 or 12.5 MHz based on the SoC. A smaller value would mean more frequent bus BW changes. A higher value would mean less frequent BW vote updates, but also means at times an unnecessarily higher BW vote (due to the rounding up). Change-Id: I88629a3e545cdca7160af8f8ca616ecc949d9947 Signed-off-by:Saravana Kannan <skannan@codeaurora.org> [aparnam@codeaurora.org: Replaced snprintf with scnprintf] Signed-off-by:
Rama Aparna Mallavarapu <aparnam@codeaurora.org>
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