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Commit 2eeee752 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Update NPU clock node for LITO"

parents d1847eb3 120d2fc8

Documentation/devicetree/bindings/clock/qcom,gpucc.txt

+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding 
Required properties :

- compatible: shall contain one of the following:

		"qcom,gpucc-kona"

		"qcom,gpucc-lito".

		"qcom,lito-gpucc".

- reg: shall contain base register offset and size.

- reg-names: names of registers listed in the same order as in the reg property.

		Must contain "cc_base".

Documentation/devicetree/bindings/clock/qcom,npucc.txt

+2 −1
Original line number Diff line number Diff line
@@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. NPU Clock & Reset Controller Bindings 
-----------------------------------------------------------------



Required properties :

- compatible:		Should be "qcom,npucc-kona".

- compatible:		Should be "qcom,npucc-kona"

				  "qcom,lito-npucc".

- reg:			Shall contain base register addresses and sizes.

- reg-names:		Names of the register bases listed in the same order as

			in the reg property.  Shall include: "cc", "qdsp6ss",

arch/arm64/boot/dts/qcom/lito-gdsc.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -139,7 +139,7 @@ 


	/* NPU GDSC */

	npu_core_gdsc: qcom,gdsc@9981004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x9981004 0x4>;

		regulator-name = "npu_core_gdsc";

		status = "disabled";

arch/arm64/boot/dts/qcom/lito-rumi.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -58,6 +58,11 @@ 
	clock-output-names = "rpmh_clocks";

};



&aopcc {

	compatible = "qcom,dummycc";

	clock-output-names = "qdss_clocks";

};



&usb0 {

	dwc3@a600000 {

		usb-phy = <&usb_emu_phy>, <&usb_nop_phy>;

arch/arm64/boot/dts/qcom/lito.dtsi

+17 −10
Original line number Diff line number Diff line
@@ -851,8 +851,9 @@ 
	};



	aopcc: qcom,aopclk {

		compatible = "qcom,dummycc";

		clock-output-names = "qdss_clocks";

		compatible = "qcom,aop-qmp-clk";

		mboxes = <&qmp_aop 0>;

		mbox-names = "qdss_clk";

		#clock-cells = <1>;

	};
@@ -901,11 +902,24 @@ 
	};



	gpucc: qcom,gpucc {

		compatible = "qcom,gpucc-lito", "syscon";

		compatible = "qcom,lito-gpucc", "syscon";

		reg = <0x3d90000 0x9000>;

		reg-names = "cc_base";

		vdd_cx-supply = <&VDD_CX_LEVEL>;

		vdd_mx-supply = <&VDD_MX_LEVEL>;

		clocks = <&rpmhcc RPMH_CXO_CLK>;

		clock-names = "xo";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	npucc: qcom,npucc {

		compatible = "qcom,lito-npucc", "syscon";

		reg = <0x9980000 0x10000>,

			<0x9800000 0x10000>,

			<0x9810000 0x10000>;

		reg-names = "cc", "qdsp6ss", "qdsp6ss_pll";

		vdd_cx-supply = <&VDD_CX_LEVEL>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};
@@ -1036,13 +1050,6 @@ 
		status = "disabled";

	};



	npucc: qcom,npucc {

		compatible = "qcom,dummycc";

		clock-output-names = "npucc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	apps_rsc: rsc@18200000 {

		label = "apps_rsc";

		compatible = "qcom,rpmh-rsc";