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Commit 120d2fc8 authored by Shefali Jain's avatar Shefali Jain Committed by Taniya Das
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ARM: dts: msm: Update NPU clock node for LITO



Update the network processing clock node to use
NPU clock driver. Also, update the NPU GDSCs to use the
regulator driver.

Change-Id: Ibed098f4bdb293f472670104386a3bab59c7189d
Signed-off-by: default avatarShefali Jain <shefjain@codeaurora.org>
parent 4d2b0727
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+1 −1
Original line number Diff line number Diff line
@@ -139,7 +139,7 @@

	/* NPU GDSC */
	npu_core_gdsc: qcom,gdsc@9981004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		reg = <0x9981004 0x4>;
		regulator-name = "npu_core_gdsc";
		status = "disabled";
+11 −7
Original line number Diff line number Diff line
@@ -913,6 +913,17 @@
		#reset-cells = <1>;
	};

	npucc: qcom,npucc {
		compatible = "qcom,lito-npucc", "syscon";
		reg = <0x9980000 0x10000>,
			<0x9800000 0x10000>,
			<0x9810000 0x10000>;
		reg-names = "cc", "qdsp6ss", "qdsp6ss_pll";
		vdd_cx-supply = <&VDD_CX_LEVEL>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	ufsphy_mem: ufsphy_mem@1d87000 {
		reg = <0x1d87000 0xe00>; /* PHY regs */
		reg-names = "phy_mem";
@@ -1039,13 +1050,6 @@
		status = "disabled";
	};

	npucc: qcom,npucc {
		compatible = "qcom,dummycc";
		clock-output-names = "npucc_clocks";
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	apps_rsc: rsc@18200000 {
		label = "apps_rsc";
		compatible = "qcom,rpmh-rsc";