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Commit 2cfd716d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'powerpc-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux 

Pull more powerpc updates from Michael Ellerman:
 "These were delayed for various reasons, so I let them sit in next a
  bit longer, rather than including them in my first pull request.

  Fixes:
   - Fix early access to cpu_spec relocation from Benjamin Herrenschmidt
   - Fix incorrect event codes in power9-event-list from Madhavan Srinivasan
   - Move register_process_table() out of ppc_md from Michael Ellerman

  Use jump_label use for [cpu|mmu]_has_feature():
   - Add mmu_early_init_devtree() from Michael Ellerman
   - Move disable_radix handling into mmu_early_init_devtree() from Michael Ellerman
   - Do hash device tree scanning earlier from Michael Ellerman
   - Do radix device tree scanning earlier from Michael Ellerman
   - Do feature patching before MMU init from Michael Ellerman
   - Check features don't change after patching from Michael Ellerman
   - Make MMU_FTR_RADIX a MMU family feature from Aneesh Kumar K.V
   - Convert mmu_has_feature() to returning bool from Michael Ellerman
   - Convert cpu_has_feature() to returning bool from Michael Ellerman
   - Define radix_enabled() in one place & use static inline from Michael Ellerman
   - Add early_[cpu|mmu]_has_feature() from Michael Ellerman
   - Convert early cpu/mmu feature check to use the new helpers from Aneesh Kumar K.V
   - jump_label: Make it possible for arches to invoke jump_label_init() earlier from Kevin Hao
   - Call jump_label_init() in apply_feature_fixups() from Aneesh Kumar K.V
   - Remove mfvtb() from Kevin Hao
   - Move cpu_has_feature() to a separate file from Kevin Hao
   - Add kconfig option to use jump labels for cpu/mmu_has_feature() from Michael Ellerman
   - Add option to use jump label for cpu_has_feature() from Kevin Hao
   - Add option to use jump label for mmu_has_feature() from Kevin Hao
   - Catch usage of cpu/mmu_has_feature() before jump label init from Aneesh Kumar K.V
   - Annotate jump label assembly from Michael Ellerman

  TLB flush enhancements from Aneesh Kumar K.V:
   - radix: Implement tlb mmu gather flush efficiently
   - Add helper for finding SLBE LLP encoding
   - Use hugetlb flush functions
   - Drop multiple definition of mm_is_core_local
   - radix: Add tlb flush of THP ptes
   - radix: Rename function and drop unused arg
   - radix/hugetlb: Add helper for finding page size
   - hugetlb: Add flush_hugetlb_tlb_range
   - remove flush_tlb_page_nohash

  Add new ptrace regsets from Anshuman Khandual and Simon Guo:
   - elf: Add powerpc specific core note sections
   - Add the function flush_tmregs_to_thread
   - Enable in transaction NT_PRFPREG ptrace requests
   - Enable in transaction NT_PPC_VMX ptrace requests
   - Enable in transaction NT_PPC_VSX ptrace requests
   - Adapt gpr32_get, gpr32_set functions for transaction
   - Enable support for NT_PPC_CGPR
   - Enable support for NT_PPC_CFPR
   - Enable support for NT_PPC_CVMX
   - Enable support for NT_PPC_CVSX
   - Enable support for TM SPR state
   - Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR
   - Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR
   - Enable support for EBB registers
   - Enable support for Performance Monitor registers"

* tag 'powerpc-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (48 commits)
  powerpc/mm: Move register_process_table() out of ppc_md
  powerpc/perf: Fix incorrect event codes in power9-event-list
  powerpc/32: Fix early access to cpu_spec relocation
  powerpc/ptrace: Enable support for Performance Monitor registers
  powerpc/ptrace: Enable support for EBB registers
  powerpc/ptrace: Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR
  powerpc/ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR
  powerpc/ptrace: Enable support for TM SPR state
  powerpc/ptrace: Enable support for NT_PPC_CVSX
  powerpc/ptrace: Enable support for NT_PPC_CVMX
  powerpc/ptrace: Enable support for NT_PPC_CFPR
  powerpc/ptrace: Enable support for NT_PPC_CGPR
  powerpc/ptrace: Adapt gpr32_get, gpr32_set functions for transaction
  powerpc/ptrace: Enable in transaction NT_PPC_VSX ptrace requests
  powerpc/ptrace: Enable in transaction NT_PPC_VMX ptrace requests
  powerpc/ptrace: Enable in transaction NT_PRFPREG ptrace requests
  powerpc/process: Add the function flush_tmregs_to_thread
  elf: Add powerpc specific core note sections
  powerpc/mm: remove flush_tlb_page_nohash
  powerpc/mm/hugetlb: Add flush_hugetlb_tlb_range
  ...
parents 755b20f4 eea8148c

arch/powerpc/Kconfig.debug

+19 −0
Original line number Diff line number Diff line
@@ -60,6 +60,25 @@ config CODE_PATCHING_SELFTEST 
	depends on DEBUG_KERNEL

	default n



config JUMP_LABEL_FEATURE_CHECKS

	bool "Enable use of jump label for cpu/mmu_has_feature()"

	depends on JUMP_LABEL

	default y

	help

	  Selecting this options enables use of jump labels for some internal

	  feature checks. This should generate more optimal code for those

	  checks.



config JUMP_LABEL_FEATURE_CHECK_DEBUG

	bool "Do extra check on feature fixup calls"

	depends on DEBUG_KERNEL && JUMP_LABEL_FEATURE_CHECKS

	default n

	help

	  This tries to catch incorrect usage of cpu_has_feature() and

	  mmu_has_feature() in the code.



	  If you don't know what this means, say N.



config FTR_FIXUP_SELFTEST

	bool "Run self-tests of the feature-fixup code"

	depends on DEBUG_KERNEL

arch/powerpc/include/asm/book3s/64/hugetlb-radix.h

+15 −0
Original line number Diff line number Diff line
@@ -11,4 +11,19 @@ extern unsigned long 
radix__hugetlb_get_unmapped_area(struct file *file, unsigned long addr,

				unsigned long len, unsigned long pgoff,

				unsigned long flags);



static inline int hstate_get_psize(struct hstate *hstate)

{

	unsigned long shift;



	shift = huge_page_shift(hstate);

	if (shift == mmu_psize_defs[MMU_PAGE_2M].shift)

		return MMU_PAGE_2M;

	else if (shift == mmu_psize_defs[MMU_PAGE_1G].shift)

		return MMU_PAGE_1G;

	else {

		WARN(1, "Wrong huge page shift\n");

		return mmu_virtual_psize;

	}

}

#endif

arch/powerpc/include/asm/book3s/64/mmu-hash.h

+10 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#include <asm/book3s/64/pgtable.h>

#include <asm/bug.h>

#include <asm/processor.h>

#include <asm/cpu_has_feature.h>



/*

 * SLB
@@ -190,6 +191,15 @@ static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize) 
	BUG();

}



static inline unsigned long get_sllp_encoding(int psize)

{

	unsigned long sllp;



	sllp = ((mmu_psize_defs[psize].sllp & SLB_VSID_L) >> 6) |

		((mmu_psize_defs[psize].sllp & SLB_VSID_LP) >> 4);

	return sllp;

}



#endif /* __ASSEMBLY__ */



/*

arch/powerpc/include/asm/book3s/64/mmu.h

+8 −8
Original line number Diff line number Diff line
@@ -23,13 +23,6 @@ struct mmu_psize_def { 
};

extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];



#ifdef CONFIG_PPC_RADIX_MMU

#define radix_enabled() mmu_has_feature(MMU_FTR_RADIX)

#else

#define radix_enabled() (0)

#endif





#endif /* __ASSEMBLY__ */



/* 64-bit classic hash table MMU */
@@ -107,6 +100,9 @@ extern int mmu_vmemmap_psize; 
extern int mmu_io_psize;



/* MMU initialization */

void mmu_early_init_devtree(void);

void hash__early_init_devtree(void);

void radix__early_init_devtree(void);

extern void radix_init_native(void);

extern void hash__early_init_mmu(void);

extern void radix__early_init_mmu(void);
@@ -132,11 +128,15 @@ extern void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base, 
static inline void setup_initial_memory_limit(phys_addr_t first_memblock_base,

					      phys_addr_t first_memblock_size)

{

	if (radix_enabled())

	if (early_radix_enabled())

		return radix__setup_initial_memory_limit(first_memblock_base,

						   first_memblock_size);

	return hash__setup_initial_memory_limit(first_memblock_base,

					   first_memblock_size);

}



extern int (*register_process_table)(unsigned long base, unsigned long page_size,

				     unsigned long tbl_size);



#endif /* __ASSEMBLY__ */

#endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */

arch/powerpc/include/asm/book3s/64/tlbflush-hash.h

+0 −5
Original line number Diff line number Diff line
@@ -75,11 +75,6 @@ static inline void hash__flush_tlb_page(struct vm_area_struct *vma, 
{

}



static inline void hash__flush_tlb_page_nohash(struct vm_area_struct *vma,

					   unsigned long vmaddr)

{

}



static inline void hash__flush_tlb_range(struct vm_area_struct *vma,

				     unsigned long start, unsigned long end)

{