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Commit 755b20f4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'metag-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag 

Pull metag architecture updates from James Hogan:
 "Just a few minor fixes:

   - Fix another incorrect inline asm register constraint, which has
     been lying quietly for 5 and a half years before finally causing
     build breakage during this merge window.

   - Removal of duplicated KERN_INFO from Joe Perches

   - Typo fixes from Andrea Gelmini"

* tag 'metag-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag:
  metag: Fix __cmpxchg_u32 asm constraint for CMP
  metag: Remove duplicate KERN_<LEVEL> prefix
  metag: Fix typos
parents dd7fd3a8 6154c187

arch/metag/include/asm/cmpxchg_lnkget.h

+1 −1
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old, 
		      "	DCACHE	[%2], %0\n"

#endif

		      "2:\n"

		      : "=&d" (temp), "=&da" (retval)

		      : "=&d" (temp), "=&d" (retval)

		      : "da" (m), "bd" (old), "da" (new)

		      : "cc"

		      );

arch/metag/include/asm/metag_mem.h

+1 −1
Original line number Diff line number Diff line
@@ -881,7 +881,7 @@ 
#define    PERFCTRL_DCSTALL 11 /* Dcache+TLB o/p delayed (per-thread) */

#define    PERFCTRL_ICSTALL 12 /* Icache+TLB o/p delayed (per-thread) */



#define    PERFCTRL_INT     13 /* Internal core delailed events (see next) */

#define    PERFCTRL_INT     13 /* Internal core detailed events (see next) */

#define    PERFCTRL_EXT     15 /* External source in core periphery */

#endif /* METAC_2_1 */

arch/metag/include/asm/metag_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -179,7 +179,7 @@ 
;   is best to dump these registers immediately at the start of a routine

;   using a MSETL or SETL instruction-

;

;   MSETL   [A0StP],D0Ar6,D0Ar4,D0Ar2; Only dump argments expected

;   MSETL   [A0StP],D0Ar6,D0Ar4,D0Ar2; Only dump arguments expected

;or SETL    [A0StP+#8++],D0Ar2       ; Up to two 32-bit args expected

;

; For non-leaf routines it is always necessary to save and restore at least

arch/metag/kernel/cachepart.c

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ 
#define SYSC_DCPART(n)	(SYSC_DCPART0 + SYSC_xCPARTn_STRIDE * (n))

#define SYSC_ICPART(n)	(SYSC_ICPART0 + SYSC_xCPARTn_STRIDE * (n))



#define CACHE_ASSOCIATIVITY 4 /* 4 way set-assosiative */

#define CACHE_ASSOCIATIVITY 4 /* 4 way set-associative */

#define ICACHE 0

#define DCACHE 1

arch/metag/lib/divsi3.S

+2 −2
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ $LIDMCQuick: 
	ADDCC   D0Re0,D0Re0,#1          ! If yes result += 1

	SUBCC   D1Ar1,D1Ar1,D1Re0       !        and A -= Bu

	ORS     D0Ar4,D0Ar4,D0Ar4       ! Return neg result?

	NEG     D0Ar2,D0Re0             ! Calulate neg result

	NEG     D0Ar2,D0Re0             ! Calculate neg result

	MOVMI   D0Re0,D0Ar2             ! Yes: Take neg result

$LIDMCRet:

	MOV     PC,D1RtP
@@ -94,7 +94,7 @@ $LIDMCLoop: 
	LSR     D1Re0, D1Re0, #1        ! Shift down B

	BNZ     $LIDMCLoop               ! Was single bit in curbit lost?

	ORS     D0Ar4,D0Ar4,D0Ar4       ! Return neg result?

	NEG     D0Ar2,D0Re0             ! Calulate neg result

	NEG     D0Ar2,D0Re0             ! Calculate neg result

	MOVMI   D0Re0,D0Ar2             ! Yes: Take neg result

	MOV     PC,D1RtP

	.size   ___divsi3,.-___divsi3