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Commit 2ccf80b7 authored by Valentin Longchamp's avatar Valentin Longchamp Committed by Scott Wood
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soc/fsl/qe: round brg_freq to 1kHz granularity



Because of integer computation rounding in u-boot (that sets the QE
brg-frequency DTS prop), the clk value is 99999999 Hz even though it is
100 MHz.

When setting brg clks that are exact divisors of 100 MHz, this small
differnce plays a role and can result in lower clks to be output (for
instance 20 MHz - divide by 5 - results in 16.666 MHz - divide by 6).

This patch fixes that by "forcing" the brg_clk to the nearest kHz when
the difference is below 2 integer rounding errors (i.e. 4).

Signed-off-by: default avatarValentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: default avatarScott Wood <oss@buserror.net>
parent b54ea82f
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