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Commit 2929e686 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "clk: qcom: Update the pll configuration for lagoon"

parents bdf17c96 33ff374b

drivers/clk/qcom/camcc-lagoon.c

+3 −3
Original line number Diff line number Diff line
@@ -184,7 +184,7 @@ static const struct alpha_pll_config cam_cc_pll0_config = { 
	.config_ctl_val = 0x20485699,

	.config_ctl_hi_val = 0x00002067,

	.test_ctl_val = 0x40000000,

	.test_ctl_hi_val = 0x00000000,

	.test_ctl_hi_val = 0x00000002,

	.user_ctl_val = 0x00000101,

	.user_ctl_hi_val = 0x00004805,

};
@@ -364,9 +364,9 @@ static const struct alpha_pll_config cam_cc_pll3_config = { 
	.config_ctl_val = 0x20485699,

	.config_ctl_hi_val = 0x00002067,

	.test_ctl_val = 0x40000000,

	.test_ctl_hi_val = 0x00000000,

	.test_ctl_hi_val = 0x00000002,

	.user_ctl_val = 0x00000001,

	.user_ctl_hi_val = 0x00004805,

	.user_ctl_hi_val = 0x00014805,

};



static struct clk_alpha_pll cam_cc_pll3 = {

drivers/clk/qcom/npucc-lagoon.c

+7 −7
Original line number Diff line number Diff line
@@ -145,11 +145,11 @@ static struct clk_alpha_pll npu_cc_pll0 = { 
	},

};



/* 300MHz Configuration */

/* 1500MHz Configuration */

static struct alpha_pll_config npu_cc_pll1_config = {

	.l = 0xF,

	.l = 0x4E,

	.cal_l = 0x33,

	.alpha = 0xA000,

	.alpha = 0x2000,

	.config_ctl_val = 0x20485699,

	.config_ctl_hi_val = 0x00002067,

	.test_ctl_val = 0x40000000,
@@ -181,11 +181,11 @@ static struct clk_alpha_pll npu_cc_pll1 = { 
	},

};



/* 250MHz Configuration */

/* 600MHz Configuration */

static struct alpha_pll_config npu_q6ss_pll_config = {

	.l = 0xD,

	.cal_l = 0x3F,

	.alpha = 0x555,

	.l = 0x1F,

	.cal_l = 0x1E,

	.alpha = 0x4000,

	.config_ctl_val = 0x20485699,

	.config_ctl_hi_val = 0x00002067,

	.test_ctl_val = 0x40000000,