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Commit 28963b1e authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: IP27: Fix build error with CONFIG_MAPPED_KERNEL



Some of the TLB bit definitions in <asm/pgtable-bits.h> have become rather
complex and are no longer usable from assembler resulting in an
explosion like this:

  AS      arch/mips/kernel/head.o
arch/mips/kernel/head.S: Assembler messages:
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: Illegal operands `li $12,(((1<<((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1))|(1<<(((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1))|(5<<(((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1)+1)))>>6)'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: Illegal operands `li $12,(((1<<((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1))|(1<<(((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1))|(1<<((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1))|(5<<(((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1)+1)))>>6)'
make[2]: *** [arch/mips/kernel/head.o] Error 1

Since now MAPPED_KERNEL_SETUP_TLB is in platform-specific code it's safe
to hardcode the TLB bits there.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 23946ef1
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+10 −2
Original line number Original line Diff line number Diff line
@@ -23,6 +23,14 @@
	dsrl	\res, NSRI_NODEID_SHFT
	dsrl	\res, NSRI_NODEID_SHFT
	.endm
	.endm


/*
 * TLB bits
 */
#define PAGE_GLOBAL		(1 << 6)
#define PAGE_VALID		(1 << 7)
#define PAGE_DIRTY		(1 << 8)
#define CACHE_CACHABLE_COW	(5 << 9)

	/*
	/*
	 * inputs are the text nasid in t1, data nasid in t2.
	 * inputs are the text nasid in t1, data nasid in t2.
	 */
	 */
@@ -44,10 +52,10 @@
	dsrl	t2, 12			# 4K pfn
	dsrl	t2, 12			# 4K pfn
	dsll	t1, 6			# Get pfn into place
	dsll	t1, 6			# Get pfn into place
	dsll	t2, 6			# Get pfn into place
	dsll	t2, 6			# Get pfn into place
	li	t0, ((_PAGE_GLOBAL|_PAGE_VALID| _CACHE_CACHABLE_COW) >> 6)
	li	t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6)
	or	t0, t0, t1
	or	t0, t0, t1
	mtc0	t0, CP0_ENTRYLO0	# physaddr, VG, cach exlwr
	mtc0	t0, CP0_ENTRYLO0	# physaddr, VG, cach exlwr
	li	t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
	li	t0, ((PAGE_GLOBAL | PAGE_VALID |  PAGE_DIRTY | CACHE_CACHABLE_COW) >> 6)
	or	t0, t0, t2
	or	t0, t0, t2
	mtc0	t0, CP0_ENTRYLO1	# physaddr, DVG, cach exlwr
	mtc0	t0, CP0_ENTRYLO1	# physaddr, DVG, cach exlwr
	li	t0, 0x1ffe000		# MAPPED_KERN_TLBMASK, TLBPGMASK_16M
	li	t0, 0x1ffe000		# MAPPED_KERN_TLBMASK, TLBPGMASK_16M