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Commit 25bb2cec authored by Thierry Reding's avatar Thierry Reding
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drm/tegra: sor: Factor out tegra_sor_set_parent_clock()



Switching the SOR parent clock can glitch if done while the clock is
enabled. Extract a common function that can be used to disable the
module clock, switch the parent and reenable the module clock.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 0751bb5c
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