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Commit 23d4f1f2 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: update comments to clarify VM setup (v2) 



The actual set up and assignment of VM page tables
is done on the fly in radeon_gart.c.

v2: update vm size comments

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
parent 29dbe3bc

drivers/gpu/drm/radeon/ni.c

+4 −0
Original line number Diff line number Diff line
@@ -770,6 +770,10 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev) 
	WREG32(0x15DC, 0);



	/* empty context1-7 */

	/* Assign the pt base to something valid for now; the pts used for

	 * the VMs are determined by the application and setup and assigned

	 * on the fly in the vm part of radeon_gart.c

	 */

	for (i = 1; i < 8; i++) {

		WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0);

		WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), 0);

drivers/gpu/drm/radeon/radeon_device.c

+4 −0
Original line number Diff line number Diff line
@@ -1018,6 +1018,10 @@ int radeon_device_init(struct radeon_device *rdev, 
		return r;

	/* initialize vm here */

	mutex_init(&rdev->vm_manager.lock);

	/* Adjust VM size here.

	 * Currently set to 4GB ((1 << 20) 4k pages).

	 * Max GPUVM size for cayman and SI is 40 bits.

	 */

	rdev->vm_manager.max_pfn = 1 << 20;

	INIT_LIST_HEAD(&rdev->vm_manager.lru_vm);

drivers/gpu/drm/radeon/si.c

+4 −3
Original line number Diff line number Diff line
@@ -2407,12 +2407,13 @@ static int si_pcie_gart_enable(struct radeon_device *rdev) 
	WREG32(0x15DC, 0);



	/* empty context1-15 */

	/* FIXME start with 4G, once using 2 level pt switch to full

	 * vm size space

	 */

	/* set vm size, must be a multiple of 4 */

	WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);

	WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn);

	/* Assign the pt base to something valid for now; the pts used for

	 * the VMs are determined by the application and setup and assigned

	 * on the fly in the vm part of radeon_gart.c

	 */

	for (i = 1; i < 16; i++) {

		if (i < 8)

			WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),