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Commit 1dde35d0 authored by Kalle Valo's avatar Kalle Valo
Browse files
ath.git patches for 4.16. Major changes:

ath10k

* enable multiqueue support for all hw using mac80211 wake_tx_queue op

* new Kconfig option ATH10K_SPECTRAL to save RAM

* show tx stats on QCA9880

* new qcom,ath10k-calibration-variant DT entry

* WMI layer support for wcn3990

ath9k

* new Kconfig option ATH9K_COMMON_SPECTRAL to save RAM

wcn36xx

* hardware scan offload support

wil6210

* run-time PM support when interface is down
parents 7de241f3 03a72288
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+3 −0
Original line number Diff line number Diff line
@@ -41,6 +41,9 @@ Optional properties:
- qcom,msi_addr: MSI interrupt address.
- qcom,msi_base: Base value to add before writing MSI data into
		MSI address register.
- qcom,ath10k-calibration-variant: string to search for in the board-2.bin
				   variant list with the same bus and device
				   specific ids
- qcom,ath10k-calibration-data : calibration data + board specific data
				 as an array, the length can vary between
				 hw versions.
+8 −1
Original line number Diff line number Diff line
@@ -47,12 +47,19 @@ config ATH10K_DEBUG
config ATH10K_DEBUGFS
	bool "Atheros ath10k debugfs support"
	depends on ATH10K && DEBUG_FS
	select RELAY
	---help---
	  Enabled debugfs support

	  If unsure, say Y to make it easier to debug problems.

config ATH10K_SPECTRAL
	bool "Atheros ath10k spectral scan support"
	depends on ATH10K_DEBUGFS
	select RELAY
	default n
	---help---
	  Say Y to enable access to the FFT/spectral data via debugfs.

config ATH10K_TRACING
	bool "Atheros ath10k tracing support"
	depends on ATH10K
+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ ath10k_core-y += mac.o \
		 p2p.o \
		 swap.o

ath10k_core-$(CONFIG_ATH10K_DEBUGFS) += spectral.o
ath10k_core-$(CONFIG_ATH10K_SPECTRAL) += spectral.o
ath10k_core-$(CONFIG_NL80211_TESTMODE) += testmode.o
ath10k_core-$(CONFIG_ATH10K_TRACING) += trace.o
ath10k_core-$(CONFIG_THERMAL) += thermal.o
+88 −7
Original line number Diff line number Diff line
@@ -75,6 +75,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 8,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA9887_HW_1_0_VERSION,
@@ -99,6 +102,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 8,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA6174_HW_2_1_VERSION,
@@ -122,6 +128,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 8,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA6174_HW_2_1_VERSION,
@@ -145,6 +154,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 8,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA6174_HW_3_0_VERSION,
@@ -168,6 +180,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 8,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA6174_HW_3_2_VERSION,
@@ -194,6 +209,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 8,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA99X0_HW_2_0_DEV_VERSION,
@@ -223,6 +241,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 11,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA9984_HW_1_0_DEV_VERSION,
@@ -257,6 +278,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 1560,
		.vht160_mcs_tx_highest = 1560,
		.n_cipher_suites = 11,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA9888_HW_2_0_DEV_VERSION,
@@ -290,6 +314,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 780,
		.vht160_mcs_tx_highest = 780,
		.n_cipher_suites = 11,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA9377_HW_1_0_DEV_VERSION,
@@ -313,6 +340,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 8,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA9377_HW_1_1_DEV_VERSION,
@@ -338,6 +368,9 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 8,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = QCA4019_HW_1_0_DEV_VERSION,
@@ -368,6 +401,27 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.vht160_mcs_rx_highest = 0,
		.vht160_mcs_tx_highest = 0,
		.n_cipher_suites = 11,
		.num_peers = TARGET_TLV_NUM_PEERS,
		.ast_skid_limit = 0x10,
		.num_wds_entries = 0x20,
	},
	{
		.id = WCN3990_HW_1_0_DEV_VERSION,
		.dev_id = 0,
		.name = "wcn3990 hw1.0",
		.continuous_frag_desc = true,
		.tx_chain_mask = 0x7,
		.rx_chain_mask = 0x7,
		.max_spatial_stream = 4,
		.fw = {
			.dir = WCN3990_HW_1_0_FW_DIR,
		},
		.sw_decrypt_mcast_mgmt = true,
		.hw_ops = &wcn3990_ops,
		.decap_align_bytes = 1,
		.num_peers = TARGET_HL_10_TLV_NUM_PEERS,
		.ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT,
		.num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES,
	},
};

@@ -390,6 +444,7 @@ static const char *const ath10k_core_fw_feature_str[] = {
	[ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
	[ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
	[ATH10K_FW_FEATURE_NO_PS] = "no-ps",
	[ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
};

static unsigned int ath10k_core_get_fw_feature_str(char *buf,
@@ -860,6 +915,28 @@ static int ath10k_core_check_smbios(struct ath10k *ar)
	return 0;
}

static int ath10k_core_check_dt(struct ath10k *ar)
{
	struct device_node *node;
	const char *variant = NULL;

	node = ar->dev->of_node;
	if (!node)
		return -ENOENT;

	of_property_read_string(node, "qcom,ath10k-calibration-variant",
				&variant);
	if (!variant)
		return -ENODATA;

	if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
		ath10k_dbg(ar, ATH10K_DBG_BOOT,
			   "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
			    variant);

	return 0;
}

static int ath10k_download_and_run_otp(struct ath10k *ar)
{
	u32 result, address = ar->hw_params.patch_load_addr;
@@ -1231,19 +1308,19 @@ static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
	/* strlen(',variant=') + strlen(ar->id.bdf_ext) */
	char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };

	if (ar->id.bdf_ext[0] != '\0')
		scnprintf(variant, sizeof(variant), ",variant=%s",
			  ar->id.bdf_ext);

	if (ar->id.bmi_ids_valid) {
		scnprintf(name, name_len,
			  "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
			  "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
			  ath10k_bus_str(ar->hif.bus),
			  ar->id.bmi_chip_id,
			  ar->id.bmi_board_id);
			  ar->id.bmi_board_id, variant);
		goto out;
	}

	if (ar->id.bdf_ext[0] != '\0')
		scnprintf(variant, sizeof(variant), ",variant=%s",
			  ar->id.bdf_ext);

	scnprintf(name, name_len,
		  "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
		  ath10k_bus_str(ar->hif.bus),
@@ -2343,7 +2420,11 @@ static int ath10k_core_probe_fw(struct ath10k *ar)

	ret = ath10k_core_check_smbios(ar);
	if (ret)
		ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not set.\n");
		ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");

	ret = ath10k_core_check_dt(ar);
	if (ret)
		ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");

	ret = ath10k_core_fetch_board_file(ar);
	if (ret) {
+6 −4
Original line number Diff line number Diff line
@@ -67,7 +67,6 @@

/* NAPI poll budget */
#define ATH10K_NAPI_BUDGET      64
#define ATH10K_NAPI_QUOTA_LIMIT 60

/* SMBIOS type containing Board Data File Name Extension */
#define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
@@ -364,11 +363,11 @@ struct ath10k_sta {
	struct rate_info txrate;

	struct work_struct update_wk;
	u64 rx_duration;

#ifdef CONFIG_MAC80211_DEBUGFS
	/* protected by conf_mutex */
	bool aggr_mode;
	u64 rx_duration;
#endif
};

@@ -463,7 +462,7 @@ struct ath10k_fw_crash_data {
	bool crashed_since_read;

	guid_t guid;
	struct timespec timestamp;
	struct timespec64 timestamp;
	__le32 registers[REG_DUMP_COUNT_QCA988X];
	struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
};
@@ -488,7 +487,6 @@ struct ath10k_debug {
	/* protected by conf_mutex */
	u64 fw_dbglog_mask;
	u32 fw_dbglog_level;
	u32 pktlog_filter;
	u32 reg_addr;
	u32 nf_cal_period;
	void *cal_data;
@@ -615,6 +613,9 @@ enum ath10k_fw_features {
	/* Firmware does not support power save in station mode. */
	ATH10K_FW_FEATURE_NO_PS = 17,

	/* Firmware allows management tx by reference instead of by value. */
	ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,

	/* keep last */
	ATH10K_FW_FEATURE_COUNT,
};
@@ -963,6 +964,7 @@ struct ath10k {
	} spectral;
#endif

	u32 pktlog_filter;
	struct {
		/* protected by conf_mutex */
		struct ath10k_fw_components utf_mode_fw;
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