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Commit 1b8c5cd8 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'rtc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux 

Pull RTC updates from Alexandre Belloni:
 "There is nothing scary this cycle, mostly driver fixes and updates.

  The core fix has been in for a while and has been tested on multiple
  kernel revisions by multiple teams.

  Core:
   - Fix setting the alarm to the next expiring timer

  New drivers:
   - Mediatek MT7622 RTC
   - NXP PCF85363
   - Spreadtrum SC27xx PMIC RTC

  Drivers updates:
   - Use generic nvmem to expose the Non volatile ram for ds1305,
     ds1511, m48t86 and omap
   - abx80x: solve possible race condition at probe
   - armada38x: support trimming the RTC oscillator
   - at91rm9200: fix reading the alarm value at boot
   - ds1511: allow waking platform
   - m41t80: rework square wave output
   - pcf8523: support trimming the RTC oscillator
   - pcf8563: fix clock output rate
   - pl031: make interrupt optional
   - xgene: fix suspend/resume"

* tag 'rtc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (50 commits)
  dt-bindings: rtc: imxdi: Improve the bindings text
  rtc: sc27xx: Add Spreadtrum SC27xx PMIC RTC driver
  dt-bindings: rtc: Add Spreadtrum SC27xx RTC documentation
  rtc: at91rm9200: fix reading alarm value
  rtc: at91rm9200: stop calculating yday in at91_rtc_readalarm
  rtc: sysfs: Use time64_t variables to set time/alarm
  rtc: xgene: mark PM functions as __maybe_unused
  rtc: xgene: Fix suspend/resume
  rtc: pcf8563: don't alway enable the alarm
  rtc: pcf8563: fix output clock rate
  rtc: rx8010: Fix for incorrect return value
  rtc: rx8010: Specify correct address for RX8010_RESV31
  rtc: rx8010: Remove duplicate define
  rtc: m41t80: remove unneeded checks from m41t80_sqw_set_rate
  rtc: m41t80: avoid i2c read in m41t80_sqw_is_prepared
  rtc: m41t80: avoid i2c read in m41t80_sqw_recalc_rate
  rtc: m41t80: fix m41t80_sqw_round_rate return value
  rtc: m41t80: m41t80_sqw_set_rate should return 0 on success
  rtc: add support for NXP PCF85363 real-time clock
  rtc: omap: Support scratch registers
  ...
parents 14b661eb 87c9fd81

Documentation/devicetree/bindings/rtc/imxdi-rtc.txt

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* i.MX25 Real Time Clock controller



This binding supports the following chips: i.MX25, i.MX53



Required properties:

- compatible: should be: "fsl,imx25-rtc"

- reg: physical base address of the controller and length of memory mapped

  region.

- clocks: should contain the phandle for the rtc clock

- interrupts: rtc alarm interrupt



Optional properties:

- interrupts: dryice security violation interrupt

- interrupts: dryice security violation interrupt (second entry)



Example:



rtc@80056000 {

	compatible = "fsl,imx53-rtc", "fsl,imx25-rtc";

	reg = <0x80056000 2000>;

	interrupts = <29 56>;

rtc@53ffc000 {

	compatible = "fsl,imx25-rtc";

	reg = <0x53ffc000 0x4000>;

	clocks = <&clks 81>;

	interrupts = <25 56>;

};

Documentation/devicetree/bindings/rtc/pcf85363.txt

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NXP PCF85363 Real Time Clock

============================



Required properties:

- compatible: Should contain "nxp,pcf85363".

- reg: I2C address for chip.



Optional properties:

- interrupts: IRQ line for the RTC (not implemented).



Example:



pcf85363: pcf85363@51 {

	compatible = "nxp,pcf85363";

	reg = <0x51>;

};

Documentation/devicetree/bindings/rtc/rtc-mt7622.txt

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Device-Tree bindings for MediaTek SoC based RTC



Required properties:

- compatible	    : Should be

			"mediatek,mt7622-rtc", "mediatek,soc-rtc" : for MT7622 SoC

- reg 		    : Specifies base physical address and size of the registers;

- interrupts	    : Should contain the interrupt for RTC alarm;

- clocks	    : Specifies list of clock specifiers, corresponding to

		      entries in clock-names property;

- clock-names	    : Should contain "rtc" entries



Example:



rtc: rtc@10212800 {

	compatible = "mediatek,mt7622-rtc",

		     "mediatek,soc-rtc";

	reg = <0 0x10212800 0 0x200>;

	interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_LOW>;

	clocks = <&topckgen CLK_TOP_RTC>;

	clock-names = "rtc";

};

Documentation/devicetree/bindings/rtc/sprd,sc27xx-rtc.txt

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Spreadtrum SC27xx Real Time Clock



Required properties:

- compatible: should be "sprd,sc2731-rtc".

- reg: address offset of rtc register.

- interrupt-parent: phandle for the interrupt controller.

- interrupts: rtc alarm interrupt.



Example:



	sc2731_pmic: pmic@0 {

		compatible = "sprd,sc2731";

		reg = <0>;

		spi-max-frequency = <26000000>;

		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-controller;

		#interrupt-cells = <2>;

		#address-cells = <1>;

		#size-cells = <0>;



		rtc@280 {

			compatible = "sprd,sc2731-rtc";

			reg = <0x280>;

			interrupt-parent = <&sc2731_pmic>;

			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;

		};

	};

Documentation/devicetree/bindings/trivial-devices.txt

+1 −1
Original line number Diff line number Diff line
@@ -72,7 +72,6 @@ maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator 
maxim,max1237		Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs

maxim,max6621		PECI-to-I2C translator for PECI-to-SMBus/I2C protocol conversion

maxim,max6625		9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface

mc,rv3029c2		Real Time Clock Module with I2C-Bus

mcube,mc3230		mCube 3-axis 8-bit digital accelerometer

memsic,mxc6225		MEMSIC 2-axis 8-bit digital accelerometer

microchip,mcp4531-502	Microchip 7-bit Single I2C Digital Potentiometer (5k)
@@ -141,6 +140,7 @@ microchip,mcp4662-503 Microchip 8-bit Dual I2C Digital Potentiometer with NV Mem 
microchip,mcp4662-104	Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)

microchip,tc654		PWM Fan Speed Controller With Fan Fault Detection

microchip,tc655		PWM Fan Speed Controller With Fan Fault Detection

microcrystal,rv3029	Real Time Clock Module with I2C-Bus

miramems,da226		MiraMEMS DA226 2-axis 14-bit digital accelerometer

miramems,da280		MiraMEMS DA280 3-axis 14-bit digital accelerometer

miramems,da311		MiraMEMS DA311 3-axis 12-bit digital accelerometer