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Commit 14b661eb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus-20171120' of git://git.infradead.org/linux-mtd

Pull MTD updates from Richard Weinberger:
 "General changes:
   -  Unconfuse get_unmapped_area and point/unpoint driver methods
   -  New partition parser: sharpslpart
   -  Kill GENERIC_IO
   -  Various fixes

  NAND changes:
   -  Add a flag to mark NANDs that require 3 address cycles to encode a
      page address
   -  Set a default ECC/free layout when NAND_ECC_NONE is requested
   -  Fix a bug in panic_nand_write()
   -  Another batch of cleanups for the denali driver
   -  Fix PM support in the atmel driver
   -  Remove support for platform data in the omap driver
   -  Fix subpage write in the omap driver
   -  Fix irq handling in the mtk driver
   -  Change link order of mtk_ecc and mtk_nand drivers to speed up boot
      time
   -  Change log level of ECC error messages in the mxc driver
   -  Patch the pxa3xx driver to support Armada 8k platforms
   -  Add BAM DMA support to the qcom driver
   -  Convert gpio-nand to the GPIO desc API
   -  Fix ECC handling in the mt29f driver

  SPI-NOR changes:
   -  Introduce system power management support
   -  New mechanism to select the proper .quad_enable() hook by JEDEC
      ID, when needed, instead of only by manufacturer ID
   -  Add support to new memory parts from Gigadevice, Winbond, Macronix
      and Everspin
   -  Maintainance for Cadence, Intel, Mediatek and STM32 drivers"

*  tag 'for-linus-20171120' of git://git.infradead.org/linux-mtd: (85 commits)
  mtd: Avoid probe failures when mtd->dbg.dfs_dir is invalid
  mtd: sharpslpart: Add sharpslpart partition parser
  mtd: Add sanity checks in mtd_write/read_oob()
  mtd: remove the get_unmapped_area method
  mtd: implement mtd_get_unmapped_area() using the point method
  mtd: chips/map_rom.c: implement point and unpoint methods
  mtd: chips/map_ram.c: implement point and unpoint methods
  mtd: mtdram: properly handle the phys argument in the point method
  mtd: mtdswap: fix spelling mistake: 'TRESHOLD' -> 'THRESHOLD'
  mtd: slram: use memremap() instead of ioremap()
  kconfig: kill off GENERIC_IO option
  mtd: Fix C++ comment in include/linux/mtd/mtd.h
  mtd: constify mtd_partition
  mtd: plat-ram: Replace manual resource management by devm
  mtd: nand: Fix writing mtdoops to nand flash.
  mtd: intel-spi: Add Intel Lewisburg PCH SPI super SKU PCI ID
  mtd: nand: mtk: fix infinite ECC decode IRQ issue
  mtd: spi-nor: Add support for mr25h128
  mtd: nand: mtk: change the compile sequence of mtk_nand.o and mtk_ecc.o
  mtd: spi-nor: enable 4B opcodes for mx66l51235l
  ...
parents 3f3211e7 1530578a
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+6 −1
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* Cadence Quad SPI controller

Required properties:
- compatible : Should be "cdns,qspi-nor".
- compatible : should be one of the following:
	Generic default - "cdns,qspi-nor".
	For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
- reg : Contains two entries, each of which is a tuple consisting of a
	physical address and length. The first entry is the address and
	length of the controller register set. The second entry is the
@@ -14,6 +16,9 @@ Required properties:

Optional properties:
- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
  the read data rather than the QSPI clock. Make sure that QSPI return
  clock is populated on the board before using this property.

Optional subnodes:
Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional
+1 −1
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@@ -29,7 +29,7 @@ nand: nand@ff900000 {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "altr,socfpga-denali-nand";
	reg = <0xff900000 0x100000>, <0xffb80000 0x10000>;
	reg = <0xff900000 0x20>, <0xffb80000 0x1000>;
	reg-names = "nand_data", "denali_reg";
	interrupts = <0 144 4>;
};
+1 −0
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@@ -14,6 +14,7 @@ Required properties:
                 at25df641
                 at26df081a
                 en25s64
                 mr25h128
                 mr25h256
                 mr25h10
                 mr25h40
+9 −6
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* Serial NOR flash controller for MTK MT81xx (and similar)

Required properties:
- compatible: 	  The possible values are:
		  "mediatek,mt2701-nor"
		  "mediatek,mt7623-nor"
- compatible: 	  For mt8173, compatible should be "mediatek,mt8173-nor",
		  and it's the fallback compatible for other Soc.
		  For every other SoC, should contain both the SoC-specific compatible
		  string and "mediatek,mt8173-nor".
		  The possible values are:
		  "mediatek,mt2701-nor", "mediatek,mt8173-nor"
		  "mediatek,mt2712-nor", "mediatek,mt8173-nor"
		  "mediatek,mt7622-nor", "mediatek,mt8173-nor"
		  "mediatek,mt7623-nor", "mediatek,mt8173-nor"
		  "mediatek,mt8173-nor"
		  For mt8173, compatible should be "mediatek,mt8173-nor".
		  For every other SoC, should contain both the SoC-specific compatible string
		  and "mediatek,mt8173-nor".
- reg: 		  physical base address and length of the controller's register
- clocks: 	  the phandle of the clocks needed by the nor controller
- clock-names: 	  the names of the clocks
+4 −0
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@@ -5,9 +5,13 @@ Required properties:
 - compatible:		Should be set to one of the following:
			marvell,pxa3xx-nand
			marvell,armada370-nand
			marvell,armada-8k-nand
 - reg: 		The register base for the controller
 - interrupts:		The interrupt to map
 - #address-cells:	Set to <1> if the node includes partitions
 - marvell,system-controller: Set to retrieve the syscon node that handles
			NAND controller related registers (only required
			with marvell,armada-8k-nand compatible).

Optional properties:

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