Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit 0f4f1114 authored by Yuan Zhao's avatar Yuan Zhao Committed by Gerrit - the friendly Code Review server
Browse files

disp: msm: dp: check HDMI max tmds clock when setting bpp



There's a max tmds clock defined in the HDMI output hub.
If the pclk of seleted display mode is larger than this max tmds
clock, there's no display in the monitor. The max tmds clock
existed in the EDID, when doing panel mode validated, must
must consider the max tmds clock. If choosed larger bpp, the
pclk may be larger than the max tmds clock.

CRs-Fixed: 2560953
Change-Id: I3758fc7c97ef5ecd10ad1504fea00fbdf432ae1b
Signed-off-by: default avatarYuan Zhao <yzhao@codeaurora.org>
parent 173773de
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment