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Commit 0ec4b188 authored by Ram Prakash Gupta's avatar Ram Prakash Gupta
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mmc: core: set REL_WR_SEC_C register to 0x1 per eMMC5.0 spec 



Some eMMC vendors violate eMMC 5.0 spec and set REL_WR_SEC_C
register to 0x10 to indicate the ability of RPMB throughput
improvement thus lead to failure when TZ module write data to
RPMB partition. This change will check bit[4] of EXT_CSD[166]
and if it is not set then change value of REL_WR_SEC_C to 0x1
directly ignoring value of EXT_CSD[222].

Change-Id: I52d1c612017eb56153f667502faaf76bc0c1bcc0
Signed-off-by: default avatarxiaonian <xiaonian@codeaurora.org>
Signed-off-by: default avatarPavan Anamula <pavana@codeaurora.org>
Signed-off-by: default avatarRam Prakash Gupta <rampraka@codeaurora.org>
parent 33d0217d

drivers/mmc/core/mmc.c

+13 −0
Original line number Diff line number Diff line
@@ -599,6 +599,19 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd) 
		card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];

		card->ext_csd.rst_n_function = ext_csd[EXT_CSD_RST_N_FUNCTION];



		/*

		 * Some eMMC vendors violate eMMC 5.0 spec and set

		 * REL_WR_SEC_C register to 0x10 to indicate the

		 * ability of RPMB throughput improvement thus lead

		 * to failure when TZ module write data to RPMB

		 * partition. So check bit[4] of EXT_CSD[166] and

		 * if it is not set then change value of REL_WR_SEC_C

		 * to 0x1 directly ignoring value of EXT_CSD[222].

		 */

		if (!(card->ext_csd.rel_param &

					EXT_CSD_WR_REL_PARAM_EN_RPMB_REL_WR))

			card->ext_csd.rel_sectors = 0x1;



		/*

		 * RPMB regions are defined in multiples of 128K.

		 */