perf tools: Bail out at "--sort dcacheline" and cacheline_size not known

There are cases where further work would be needed to overcome the fact
that neither sysconf(_SC_LEVEL1_DCACHE_LINESIZE) nor
/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size are
available in some systems (Android, for instance), so bail out when such
a situation takes place.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Wang Nan <wangnan0@huawei.com>
Link: http://lkml.kernel.org/n/tip-ho8d8g8mh0o2dri7ckcccafi@git.kernel.org


Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>