Commit 00e6751f authored Sep 01, 2017 by Elaine Zhang Committed by Heiko Stuebner Sep 17, 2017

clk: rockchip: add sclk_timer5 as critical clock on rk3128



sclk_timer5 is for arm arch counter, so need always on.
but no dts node to handle this clk, so make it as critical clock

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

parent a4eb2865

drivers/clk/rockchip/clk-rk3128.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -578,6 +578,7 @@ static const char *const rk3128_critical_clocks[] __initconst = {
		"hclk_peri",
		"pclk_peri",
		"pclk_pmu",
		"sclk_timer5",
		};

		static struct rockchip_clk_provider __init rk3128_common_clk_init(struct device_node np)