clk: mvebu: use correct bit for 98DX3236 NAND

The correct fieldbit value for the NAND PLL reload trigger is 27.

Fixes: commit e120c17a ("clk: mvebu: support for 98DX3236 SoC")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>