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Commit fe5cb75f authored by Hugh Dickins's avatar Hugh Dickins Committed by Greg Kroah-Hartman
Browse files

kaiser: kaiser_flush_tlb_on_return_to_user() check PCID 




Let kaiser_flush_tlb_on_return_to_user() do the X86_FEATURE_PCID
check, instead of each caller doing it inline first: nobody needs
to optimize for the noPCID case, it's clearer this way, and better
suits later changes.  Replace those no-op X86_CR3_PCID_KERN_FLUSH lines
by a BUILD_BUG_ON() in load_new_mm_cr3(), in case something changes.

Signed-off-by: default avatarHugh Dickins <hughd@google.com>
Acked-by: default avatarJiri Kosina <jkosina@suse.cz>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b72c26e9

arch/x86/include/asm/tlbflush.h

+2 −2
Original line number Diff line number Diff line
@@ -158,7 +158,7 @@ static inline void __native_flush_tlb(void) 
	 * back:

	 */

	preempt_disable();

	if (kaiser_enabled && this_cpu_has(X86_FEATURE_PCID))

	if (kaiser_enabled)

		kaiser_flush_tlb_on_return_to_user();

	native_write_cr3(native_read_cr3());

	preempt_enable();
@@ -217,7 +217,7 @@ static inline void __native_flush_tlb_single(unsigned long addr) 
	 */



	if (!this_cpu_has(X86_FEATURE_INVPCID_SINGLE)) {

		if (kaiser_enabled && this_cpu_has(X86_FEATURE_PCID))

		if (kaiser_enabled)

			kaiser_flush_tlb_on_return_to_user();

		asm volatile("invlpg (%0)" ::"r" (addr) : "memory");

		return;

arch/x86/mm/kaiser.c

+3 −3
Original line number Diff line number Diff line
@@ -435,11 +435,11 @@ void kaiser_setup_pcid(void) 


/*

 * Make a note that this cpu will need to flush USER tlb on return to user.

 * Caller checks whether this_cpu_has(X86_FEATURE_PCID) before calling:

 * if cpu does not, then the NOFLUSH bit will never have been set.

 * If cpu does not have PCID, then the NOFLUSH bit will never have been set.

 */

void kaiser_flush_tlb_on_return_to_user(void)

{

	if (this_cpu_has(X86_FEATURE_PCID))

		this_cpu_write(x86_cr3_pcid_user,

			X86_CR3_PCID_USER_FLUSH | KAISER_SHADOW_PGD_OFFSET);

}

arch/x86/mm/tlb.c

+4 −4
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ static void load_new_mm_cr3(pgd_t *pgdir) 
{

	unsigned long new_mm_cr3 = __pa(pgdir);



	if (kaiser_enabled && this_cpu_has(X86_FEATURE_PCID)) {

	if (kaiser_enabled) {

		/*

		 * We reuse the same PCID for different tasks, so we must

		 * flush all the entries for the PCID out when we change tasks.
@@ -50,10 +50,10 @@ static void load_new_mm_cr3(pgd_t *pgdir) 
		 * do it here, but can only be used if X86_FEATURE_INVPCID is

		 * available - and many machines support pcid without invpcid.

		 *

		 * The line below is a no-op: X86_CR3_PCID_KERN_FLUSH is now 0;

		 * but keep that line in there in case something changes.

		 * If X86_CR3_PCID_KERN_FLUSH actually added something, then it

		 * would be needed in the write_cr3() below - if PCIDs enabled.

		 */

		new_mm_cr3 |= X86_CR3_PCID_KERN_FLUSH;

		BUILD_BUG_ON(X86_CR3_PCID_KERN_FLUSH);

		kaiser_flush_tlb_on_return_to_user();

	}