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Commit f5fd32bc authored by Alan Kwong's avatar Alan Kwong
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drm/msm/sde: issue flush for rot fetch update only if differs



Current rotator fetch update always flushes the timing engine and
this is not required. Add check to flush the timing engine only
if rotator fetch update is different from last update.

Change-Id: I7acdd7787e5ee56285be92c29da4f6ee5cfb8aff
Signed-off-by: default avatarAlan Kwong <akwong@codeaurora.org>
parent 2f89b761
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+4 −2
Original line number Diff line number Diff line
@@ -283,13 +283,15 @@ static inline int sde_encoder_phys_inc_pending(struct sde_encoder_phys *phys)
 * @base:	Baseclass physical encoder structure
 * @hw_intf:	Hardware interface to the intf registers
 * @timing_params: Current timing parameter
 * @rot_prefill_line: number of line to prefill for inline rotation; 0 disable
 * @rot_fetch:	Prefill for inline rotation
 * @rot_fetch_valid: true if rot_fetch is updated (reset in enc enable)
 */
struct sde_encoder_phys_vid {
	struct sde_encoder_phys base;
	struct sde_hw_intf *hw_intf;
	struct intf_timing_params timing_params;
	u64 rot_prefill_line;
	struct intf_prog_fetch rot_fetch;
	bool rot_fetch_valid;
};

/**
+11 −0
Original line number Diff line number Diff line
@@ -282,6 +282,11 @@ static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc,
		}
	}

	/* return if rot_fetch does not change since last update */
	if (vid_enc->rot_fetch_valid &&
			!memcmp(&vid_enc->rot_fetch, &f, sizeof(f)))
		return;

	SDE_DEBUG_VIDENC(vid_enc,
		"rot_fetch_lines %u rot_fetch_start_vsync_counter %u\n",
		rot_fetch_lines, rot_fetch_start_vsync_counter);
@@ -294,6 +299,9 @@ static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc,
	spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags);
	vid_enc->hw_intf->ops.setup_rot_start(vid_enc->hw_intf, &f);
	spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);

	vid_enc->rot_fetch = f;
	vid_enc->rot_fetch_valid = true;
}

static bool sde_encoder_phys_vid_mode_fixup(
@@ -584,6 +592,9 @@ static void sde_encoder_phys_vid_enable(struct sde_encoder_phys *phys_enc)
	if (WARN_ON(!vid_enc->hw_intf->ops.enable_timing))
		return;

	/* reset state variables until after first update */
	vid_enc->rot_fetch_valid = false;

	sde_encoder_helper_split_config(phys_enc, vid_enc->hw_intf->idx);

	sde_encoder_phys_vid_setup_timing_engine(phys_enc);