Merge "msm: kgsl: Correctly derive DDR stall cycles from GBIF power counters" (f0cdc22c) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/msm/adreno.c

+24 −0

Original line number	Diff line number	Diff line
		@@ -1626,6 +1626,21 @@ static int _adreno_start(struct adreno_device *adreno_dev)
		}
		}

		if (adreno_has_gbif(adreno_dev)) {
		if (adreno_dev->starved_ram_lo_ch1 == 0) {
		ret = adreno_perfcounter_get(adreno_dev,
		KGSL_PERFCOUNTER_GROUP_VBIF_PWR, 1,
		&adreno_dev->starved_ram_lo_ch1, NULL,
		PERFCOUNTER_FLAG_KERNEL);

		if (ret) {
		KGSL_DRV_ERR(device,
		"Unable to get perf counters for bus DCVS\n");
		adreno_dev->starved_ram_lo_ch1 = 0;
		}
		}
		}

		/* VBIF DDR cycles */
		if (adreno_dev->ram_cycles_lo == 0) {
		ret = adreno_perfcounter_get(adreno_dev,
		@@ -1646,6 +1661,7 @@ static int _adreno_start(struct adreno_device *adreno_dev)
		adreno_dev->busy_data.gpu_busy = 0;
		adreno_dev->busy_data.vbif_ram_cycles = 0;
		adreno_dev->busy_data.vbif_starved_ram = 0;
		adreno_dev->busy_data.vbif_starved_ram_ch1 = 0;

		/* Restore performance counter registers with saved values */
		adreno_perfcounter_restore(adreno_dev);
		@@ -2481,6 +2497,7 @@ int adreno_soft_reset(struct kgsl_device *device)
		adreno_dev->busy_data.gpu_busy = 0;
		adreno_dev->busy_data.vbif_ram_cycles = 0;
		adreno_dev->busy_data.vbif_starved_ram = 0;
		adreno_dev->busy_data.vbif_starved_ram_ch1 = 0;

		/* Set the page table back to the default page table */
		adreno_ringbuffer_set_global(adreno_dev, 0);
		@@ -3068,6 +3085,13 @@ static void adreno_power_stats(struct kgsl_device *device,
		adreno_dev->starved_ram_lo,
		&busy->vbif_starved_ram);

		if (adreno_has_gbif(adreno_dev)) {
		if (adreno_dev->starved_ram_lo_ch1 != 0)
		starved_ram += counter_delta(device,
		adreno_dev->starved_ram_lo_ch1,
		&busy->vbif_starved_ram_ch1);
		}

		stats->ram_time = ram_cycles;
		stats->ram_wait = starved_ram;
		}

drivers/gpu/msm/adreno.h

+6 −1

Original line number	Diff line number	Diff line
		@@ -284,6 +284,7 @@ struct adreno_busy_data {
		unsigned int gpu_busy;
		unsigned int vbif_ram_cycles;
		unsigned int vbif_starved_ram;
		unsigned int vbif_starved_ram_ch1;
		unsigned int throttle_cycles[ADRENO_GPMU_THROTTLE_COUNTERS];
		};

		@@ -401,7 +402,10 @@ struct adreno_gpu_core {
		* @input_work: Work struct for turning on the GPU after a touch event
		* @busy_data: Struct holding GPU VBIF busy stats
		* @ram_cycles_lo: Number of DDR clock cycles for the monitor session
		* @perfctr_pwr_lo: Number of cycles VBIF is stalled by DDR
		* @starved_ram_lo: Number of cycles VBIF/GBIF is stalled by DDR (Only channel 0
		* stall cycles in case of GBIF)
		* @starved_ram_lo_ch1: Number of cycles GBIF is stalled by DDR channel 1
		* @perfctr_pwr_lo: GPU busy cycles
		* @halt: Atomic variable to check whether the GPU is currently halted
		* @pending_irq_refcnt: Atomic variable to keep track of running IRQ handlers
		* @ctx_d_debugfs: Context debugfs node
		@@ -462,6 +466,7 @@ struct adreno_device {
		struct adreno_busy_data busy_data;
		unsigned int ram_cycles_lo;
		unsigned int starved_ram_lo;
		unsigned int starved_ram_lo_ch1;
		unsigned int perfctr_pwr_lo;
		atomic_t halt;
		atomic_t pending_irq_refcnt;