msm: camera: fd: Fix the order of clearing and handling IRQs

This is to fix the issue regarding the clearing of FD IRQs
to avoid camera FD HW reset timeout and long camera start delay.
Camera FD driver triggers a SW halt command, followed by a SW
reset. The driver is blocked waiting on a notification from the
interrupt handler after triggering the halt command. The
interrupt handler gets invoked to handle halt_done interrupt
and notify the driver (this is before it clears the interrupt
status register), so driver moves on to reset FD HW, and
reset_done bit may get set before the interrupt handler clears
the interrupt status register, so when the interrupt handler
clears the status register, it may clear both halt_done and
reset_done. When the interrupt handler gets invoked again to
handle reset_done interrupt, value of the interrupt status
register has already been cleared, resulting in the reset
timeout issue.
The fix is that IRQ handler clears IRQ status register before
notifying driver and clears only the handled bit.

CRs-Fixed: 2330280

Change-Id: I9384514a0083721280e83e74ffd5acec0e619a45
Signed-off-by: Yizheng Zhou <yizhengz@codeaurora.org>
Signed-off-by: Harsh Shah <harshs@codeaurora.org>