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Commit e38d92fd authored by Kevin Hilman's avatar Kevin Hilman
Browse files

davinci: DM646x: add base SoC and board support 



Add support for DM646x SoC (a.k.a DaVinci HD) and its Evalution
Module (EVM.)

Original support done by Sudhakar Rajashekhara.

Signed-off-by: default avatarSudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 95a3477f

arch/arm/mach-davinci/Kconfig

+12 −0
Original line number Diff line number Diff line
@@ -13,6 +13,9 @@ config ARCH_DAVINCI_DM644x 
config ARCH_DAVINCI_DM355

        bool "DaVinci 355 based system"



config ARCH_DAVINCI_DM646x

        bool "DaVinci 646x based system"



comment "DaVinci Board Type"



config MACH_DAVINCI_EVM
@@ -47,6 +50,15 @@ config MACH_DM355_LEOPARD 
	  Configure this option to specify the whether the board used

	  for development is a DM355 Leopard board.



config MACH_DAVINCI_DM6467_EVM

	bool "TI DM6467 EVM"

	default n

	depends on ARCH_DAVINCI_DM646x

	help

	  Configure this option to specify the whether the board used

	  for development is a DM6467 EVM





config DAVINCI_MUX

	bool "DAVINCI multiplexing support"

	depends on ARCH_DAVINCI

arch/arm/mach-davinci/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -13,9 +13,11 @@ obj-$(CONFIG_CP_INTC) += cp_intc.o 
# Chip specific

obj-$(CONFIG_ARCH_DAVINCI_DM644x)       += dm644x.o

obj-$(CONFIG_ARCH_DAVINCI_DM355)        += dm355.o

obj-$(CONFIG_ARCH_DAVINCI_DM646x)       += dm646x.o



# Board specific

obj-$(CONFIG_MACH_DAVINCI_EVM)  	+= board-dm644x-evm.o

obj-$(CONFIG_MACH_SFFSDR)		+= board-sffsdr.o

obj-$(CONFIG_MACH_DAVINCI_DM355_EVM)	+= board-dm355-evm.o

obj-$(CONFIG_MACH_DM355_LEOPARD)	+= board-dm355-leopard.o

obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM)	+= board-dm646x-evm.o

arch/arm/mach-davinci/board-dm646x-evm.c

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+280 −0
Original line number Diff line number Diff line 
/*

 * TI DaVinci DM646X EVM board

 *

 * Derived from: arch/arm/mach-davinci/board-evm.c

 * Copyright (C) 2006 Texas Instruments.

 *

 * (C) 2007-2008, MontaVista Software, Inc.

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2. This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 *

 */



/**************************************************************************

 * Included Files

 **************************************************************************/



#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/init.h>

#include <linux/fs.h>

#include <linux/major.h>

#include <linux/root_dev.h>

#include <linux/dma-mapping.h>

#include <linux/serial.h>

#include <linux/serial_8250.h>

#include <linux/leds.h>

#include <linux/gpio.h>

#include <linux/io.h>

#include <linux/platform_device.h>

#include <linux/i2c.h>

#include <linux/i2c/at24.h>

#include <linux/i2c/pcf857x.h>

#include <linux/etherdevice.h>



#include <asm/setup.h>

#include <asm/mach-types.h>

#include <asm/mach/arch.h>

#include <asm/mach/map.h>

#include <asm/mach/flash.h>



#include <mach/dm646x.h>

#include <mach/common.h>

#include <mach/psc.h>

#include <mach/serial.h>

#include <mach/i2c.h>



static struct davinci_uart_config uart_config __initdata = {

	.enabled_uarts = (1 << 0),

};



/* LEDS */



static struct gpio_led evm_leds[] = {

	{ .name = "DS1", .active_low = 1, },

	{ .name = "DS2", .active_low = 1, },

	{ .name = "DS3", .active_low = 1, },

	{ .name = "DS4", .active_low = 1, },

};



static __initconst struct gpio_led_platform_data evm_led_data = {

	.num_leds = ARRAY_SIZE(evm_leds),

	.leds     = evm_leds,

};



static struct platform_device *evm_led_dev;



static int evm_led_setup(struct i2c_client *client, int gpio,

			unsigned int ngpio, void *c)

{

	struct gpio_led *leds = evm_leds;

	int status;



	while (ngpio--) {

		leds->gpio = gpio++;

		leds++;

	};



	evm_led_dev = platform_device_alloc("leds-gpio", 0);

	platform_device_add_data(evm_led_dev, &evm_led_data,

				sizeof(evm_led_data));



	evm_led_dev->dev.parent = &client->dev;

	status = platform_device_add(evm_led_dev);

	if (status < 0) {

		platform_device_put(evm_led_dev);

		evm_led_dev = NULL;

	}

	return status;

}



static int evm_led_teardown(struct i2c_client *client, int gpio,

				unsigned ngpio, void *c)

{

	if (evm_led_dev) {

		platform_device_unregister(evm_led_dev);

		evm_led_dev = NULL;

	}

	return 0;

}



static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };



static int evm_sw_setup(struct i2c_client *client, int gpio,

			unsigned ngpio, void *c)

{

	int status;

	int i;

	char label[10];



	for (i = 0; i < 4; ++i) {

		snprintf(label, 10, "user_sw%d", i);

		status = gpio_request(gpio, label);

		if (status)

			goto out_free;

		evm_sw_gpio[i] = gpio++;



		status = gpio_direction_input(evm_sw_gpio[i]);

		if (status) {

			gpio_free(evm_sw_gpio[i]);

			evm_sw_gpio[i] = -EINVAL;

			goto out_free;

		}



		status = gpio_export(evm_sw_gpio[i], 0);

		if (status) {

			gpio_free(evm_sw_gpio[i]);

			evm_sw_gpio[i] = -EINVAL;

			goto out_free;

		}

	}

	return status;

out_free:

	for (i = 0; i < 4; ++i) {

		if (evm_sw_gpio[i] != -EINVAL) {

			gpio_free(evm_sw_gpio[i]);

			evm_sw_gpio[i] = -EINVAL;

		}

	}

	return status;

}



static int evm_sw_teardown(struct i2c_client *client, int gpio,

			unsigned ngpio, void *c)

{

	int i;



	for (i = 0; i < 4; ++i) {

		if (evm_sw_gpio[i] != -EINVAL) {

			gpio_unexport(evm_sw_gpio[i]);

			gpio_free(evm_sw_gpio[i]);

			evm_sw_gpio[i] = -EINVAL;

		}

	}

	return 0;

}



static int evm_pcf_setup(struct i2c_client *client, int gpio,

			unsigned int ngpio, void *c)

{

	int status;



	if (ngpio < 8)

		return -EINVAL;



	status = evm_sw_setup(client, gpio, 4, c);

	if (status)

		return status;



	return evm_led_setup(client, gpio+4, 4, c);

}



static int evm_pcf_teardown(struct i2c_client *client, int gpio,

			unsigned int ngpio, void *c)

{

	BUG_ON(ngpio < 8);



	evm_sw_teardown(client, gpio, 4, c);

	evm_led_teardown(client, gpio+4, 4, c);



	return 0;

}



static struct pcf857x_platform_data pcf_data = {

	.gpio_base	= DAVINCI_N_GPIO+1,

	.setup		= evm_pcf_setup,

	.teardown	= evm_pcf_teardown,

};



/* Most of this EEPROM is unused, but U-Boot uses some data:

 *  - 0x7f00, 6 bytes Ethernet Address

 *  - ... newer boards may have more

 */

static struct memory_accessor *at24_mem_acc;



static void at24_setup(struct memory_accessor *mem_acc, void *context)

{

	char mac_addr[6];



	at24_mem_acc = mem_acc;



	/* Read MAC addr from EEPROM */

	if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x7f00, ETH_ALEN) ==

	    ETH_ALEN)

		pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr);

}



static struct at24_platform_data eeprom_info = {

	.byte_len       = (256*1024) / 8,

	.page_size      = 64,

	.flags          = AT24_FLAG_ADDR16,

	.setup          = at24_setup,

};



int dm646xevm_eeprom_read(void *buf, off_t off, size_t count)

{

	if (at24_mem_acc)

		return at24_mem_acc->read(at24_mem_acc, buf, off, count);

	return -ENODEV;

}

EXPORT_SYMBOL(dm646xevm_eeprom_read);



int dm646xevm_eeprom_write(void *buf, off_t off, size_t count)

{

	if (at24_mem_acc)

		return at24_mem_acc->write(at24_mem_acc, buf, off, count);

	return -ENODEV;

}

EXPORT_SYMBOL(dm646xevm_eeprom_write);



static struct i2c_board_info __initdata i2c_info[] =  {

	{

		I2C_BOARD_INFO("24c256", 0x50),

		.platform_data  = &eeprom_info,

	},

	{

		I2C_BOARD_INFO("pcf8574a", 0x38),

		.platform_data	= &pcf_data,

	},

};



static struct davinci_i2c_platform_data i2c_pdata = {

	.bus_freq       = 100 /* kHz */,

	.bus_delay      = 0 /* usec */,

};



static void __init evm_init_i2c(void)

{

	davinci_init_i2c(&i2c_pdata);

	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));

}



static void __init davinci_map_io(void)

{

	davinci_map_common_io();

	dm646x_init();

}



static __init void evm_init(void)

{

	evm_init_i2c();

	davinci_serial_init(&uart_config);

}



static __init void davinci_dm646x_evm_irq_init(void)

{

	davinci_irq_init();

}



MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")

	.phys_io      = IO_PHYS,

	.io_pg_offst  = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,

	.boot_params  = (0x80000100),

	.map_io       = davinci_map_io,

	.init_irq     = davinci_dm646x_evm_irq_init,

	.timer        = &davinci_timer,

	.init_machine = evm_init,

MACHINE_END

arch/arm/mach-davinci/dm646x.c

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/*

 * TI DaVinci DM644x chip specific setup

 *

 * Author: Kevin Hilman, Deep Root Systems, LLC

 *

 * 2007 (c) Deep Root Systems, LLC. This file is licensed under

 * the terms of the GNU General Public License version 2. This program

 * is licensed "as is" without any warranty of any kind, whether express

 * or implied.

 */

#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/clk.h>

#include <linux/platform_device.h>



#include <mach/dm646x.h>

#include <mach/clock.h>

#include <mach/cputype.h>

#include <mach/edma.h>

#include <mach/irqs.h>

#include <mach/psc.h>

#include <mach/mux.h>



#include "clock.h"

#include "mux.h"



/*

 * Device specific clocks

 */

#define DM646X_REF_FREQ		27000000

#define DM646X_AUX_FREQ		24000000



static struct pll_data pll1_data = {

	.num       = 1,

	.phys_base = DAVINCI_PLL1_BASE,

};



static struct pll_data pll2_data = {

	.num       = 2,

	.phys_base = DAVINCI_PLL2_BASE,

};



static struct clk ref_clk = {

	.name = "ref_clk",

	.rate = DM646X_REF_FREQ,

};



static struct clk aux_clkin = {

	.name = "aux_clkin",

	.rate = DM646X_AUX_FREQ,

};



static struct clk pll1_clk = {

	.name = "pll1",

	.parent = &ref_clk,

	.pll_data = &pll1_data,

	.flags = CLK_PLL,

};



static struct clk pll1_sysclk1 = {

	.name = "pll1_sysclk1",

	.parent = &pll1_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV1,

};



static struct clk pll1_sysclk2 = {

	.name = "pll1_sysclk2",

	.parent = &pll1_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV2,

};



static struct clk pll1_sysclk3 = {

	.name = "pll1_sysclk3",

	.parent = &pll1_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV3,

};



static struct clk pll1_sysclk4 = {

	.name = "pll1_sysclk4",

	.parent = &pll1_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV4,

};



static struct clk pll1_sysclk5 = {

	.name = "pll1_sysclk5",

	.parent = &pll1_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV5,

};



static struct clk pll1_sysclk6 = {

	.name = "pll1_sysclk6",

	.parent = &pll1_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV6,

};



static struct clk pll1_sysclk8 = {

	.name = "pll1_sysclk8",

	.parent = &pll1_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV8,

};



static struct clk pll1_sysclk9 = {

	.name = "pll1_sysclk9",

	.parent = &pll1_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV9,

};



static struct clk pll1_sysclkbp = {

	.name = "pll1_sysclkbp",

	.parent = &pll1_clk,

	.flags = CLK_PLL | PRE_PLL,

	.div_reg = BPDIV,

};



static struct clk pll1_aux_clk = {

	.name = "pll1_aux_clk",

	.parent = &pll1_clk,

	.flags = CLK_PLL | PRE_PLL,

};



static struct clk pll2_clk = {

	.name = "pll2_clk",

	.parent = &ref_clk,

	.pll_data = &pll2_data,

	.flags = CLK_PLL,

};



static struct clk pll2_sysclk1 = {

	.name = "pll2_sysclk1",

	.parent = &pll2_clk,

	.flags = CLK_PLL,

	.div_reg = PLLDIV1,

};



static struct clk dsp_clk = {

	.name = "dsp",

	.parent = &pll1_sysclk1,

	.lpsc = DM646X_LPSC_C64X_CPU,

	.flags = PSC_DSP,

	.usecount = 1,			/* REVISIT how to disable? */

};



static struct clk arm_clk = {

	.name = "arm",

	.parent = &pll1_sysclk2,

	.lpsc = DM646X_LPSC_ARM,

	.flags = ALWAYS_ENABLED,

};



static struct clk uart0_clk = {

	.name = "uart0",

	.parent = &aux_clkin,

	.lpsc = DM646X_LPSC_UART0,

};



static struct clk uart1_clk = {

	.name = "uart1",

	.parent = &aux_clkin,

	.lpsc = DM646X_LPSC_UART1,

};



static struct clk uart2_clk = {

	.name = "uart2",

	.parent = &aux_clkin,

	.lpsc = DM646X_LPSC_UART2,

};



static struct clk i2c_clk = {

	.name = "I2CCLK",

	.parent = &pll1_sysclk3,

	.lpsc = DM646X_LPSC_I2C,

};



static struct clk gpio_clk = {

	.name = "gpio",

	.parent = &pll1_sysclk3,

	.lpsc = DM646X_LPSC_GPIO,

};



static struct clk aemif_clk = {

	.name = "aemif",

	.parent = &pll1_sysclk3,

	.lpsc = DM646X_LPSC_AEMIF,

	.flags = ALWAYS_ENABLED,

};



static struct clk emac_clk = {

	.name = "emac",

	.parent = &pll1_sysclk3,

	.lpsc = DM646X_LPSC_EMAC,

};



static struct clk pwm0_clk = {

	.name = "pwm0",

	.parent = &pll1_sysclk3,

	.lpsc = DM646X_LPSC_PWM0,

	.usecount = 1,            /* REVIST: disabling hangs system */

};



static struct clk pwm1_clk = {

	.name = "pwm1",

	.parent = &pll1_sysclk3,

	.lpsc = DM646X_LPSC_PWM1,

	.usecount = 1,            /* REVIST: disabling hangs system */

};



static struct clk timer0_clk = {

	.name = "timer0",

	.parent = &pll1_sysclk3,

	.lpsc = DM646X_LPSC_TIMER0,

};



static struct clk timer1_clk = {

	.name = "timer1",

	.parent = &pll1_sysclk3,

	.lpsc = DM646X_LPSC_TIMER1,

};



static struct clk timer2_clk = {

	.name = "timer2",

	.parent = &pll1_sysclk3,

	.flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */

};



static struct clk vpif0_clk = {

	.name = "vpif0",

	.parent = &ref_clk,

	.lpsc = DM646X_LPSC_VPSSMSTR,

	.flags = ALWAYS_ENABLED,

};



static struct clk vpif1_clk = {

	.name = "vpif1",

	.parent = &ref_clk,

	.lpsc = DM646X_LPSC_VPSSSLV,

	.flags = ALWAYS_ENABLED,

};



struct davinci_clk dm646x_clks[] = {

	CLK(NULL, "ref", &ref_clk),

	CLK(NULL, "aux", &aux_clkin),

	CLK(NULL, "pll1", &pll1_clk),

	CLK(NULL, "pll1_sysclk", &pll1_sysclk1),

	CLK(NULL, "pll1_sysclk", &pll1_sysclk2),

	CLK(NULL, "pll1_sysclk", &pll1_sysclk3),

	CLK(NULL, "pll1_sysclk", &pll1_sysclk4),

	CLK(NULL, "pll1_sysclk", &pll1_sysclk5),

	CLK(NULL, "pll1_sysclk", &pll1_sysclk6),

	CLK(NULL, "pll1_sysclk", &pll1_sysclk8),

	CLK(NULL, "pll1_sysclk", &pll1_sysclk9),

	CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),

	CLK(NULL, "pll1_aux", &pll1_aux_clk),

	CLK(NULL, "pll2", &pll2_clk),

	CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),

	CLK(NULL, "dsp", &dsp_clk),

	CLK(NULL, "arm", &arm_clk),

	CLK(NULL, "uart0", &uart0_clk),

	CLK(NULL, "uart1", &uart1_clk),

	CLK(NULL, "uart2", &uart2_clk),

	CLK("i2c_davinci.1", NULL, &i2c_clk),

	CLK(NULL, "gpio", &gpio_clk),

	CLK(NULL, "aemif", &aemif_clk),

	CLK("davinci_emac.1", NULL, &emac_clk),

	CLK(NULL, "pwm0", &pwm0_clk),

	CLK(NULL, "pwm1", &pwm1_clk),

	CLK(NULL, "timer0", &timer0_clk),

	CLK(NULL, "timer1", &timer1_clk),

	CLK("watchdog", NULL, &timer2_clk),

	CLK(NULL, "vpif0", &vpif0_clk),

	CLK(NULL, "vpif1", &vpif1_clk),

	CLK(NULL, NULL, NULL),

};



/*

 * Device specific mux setup

 *

 *	soc	description	mux  mode   mode  mux	 dbg

 *				reg  offset mask  mode

 */

static const struct mux_config dm646x_pins[] = {

MUX_CFG(DM646X, ATAEN,		0,   0,     1,	  1,	 true)



MUX_CFG(DM646X, AUDCK1,		0,   29,    1,	  0,	 false)



MUX_CFG(DM646X, AUDCK0,		0,   28,    1,	  0,	 false)



MUX_CFG(DM646X, CRGMUX,			0,   24,    7,    5,	 true)



MUX_CFG(DM646X, STSOMUX_DISABLE,	0,   22,    3,    0,	 true)



MUX_CFG(DM646X, STSIMUX_DISABLE,	0,   20,    3,    0,	 true)



MUX_CFG(DM646X, PTSOMUX_DISABLE,	0,   18,    3,    0,	 true)



MUX_CFG(DM646X, PTSIMUX_DISABLE,	0,   16,    3,    0,	 true)



MUX_CFG(DM646X, STSOMUX,		0,   22,    3,    2,	 true)



MUX_CFG(DM646X, STSIMUX,		0,   20,    3,    2,	 true)



MUX_CFG(DM646X, PTSOMUX_PARALLEL,	0,   18,    3,    2,	 true)



MUX_CFG(DM646X, PTSIMUX_PARALLEL,	0,   16,    3,    2,	 true)



MUX_CFG(DM646X, PTSOMUX_SERIAL,		0,   18,    3,    3,	 true)



MUX_CFG(DM646X, PTSIMUX_SERIAL,		0,   16,    3,    3,	 true)

};



/*----------------------------------------------------------------------*/



static const s8 dma_chan_dm646x_no_event[] = {

	 0,  1,  2,  3, 13,

	14, 15, 24, 25, 26,

	27, 30, 31, 54, 55,

	56,

	-1

};



static struct edma_soc_info dm646x_edma_info = {

	.n_channel	= 64,

	.n_region	= 6,	/* 0-1, 4-7 */

	.n_slot		= 512,

	.n_tc		= 4,

	.noevent	= dma_chan_dm646x_no_event,

};



static struct resource edma_resources[] = {

	{

		.name	= "edma_cc",

		.start	= 0x01c00000,

		.end	= 0x01c00000 + SZ_64K - 1,

		.flags	= IORESOURCE_MEM,

	},

	{

		.name	= "edma_tc0",

		.start	= 0x01c10000,

		.end	= 0x01c10000 + SZ_1K - 1,

		.flags	= IORESOURCE_MEM,

	},

	{

		.name	= "edma_tc1",

		.start	= 0x01c10400,

		.end	= 0x01c10400 + SZ_1K - 1,

		.flags	= IORESOURCE_MEM,

	},

	{

		.name	= "edma_tc2",

		.start	= 0x01c10800,

		.end	= 0x01c10800 + SZ_1K - 1,

		.flags	= IORESOURCE_MEM,

	},

	{

		.name	= "edma_tc3",

		.start	= 0x01c10c00,

		.end	= 0x01c10c00 + SZ_1K - 1,

		.flags	= IORESOURCE_MEM,

	},

	{

		.start	= IRQ_CCINT0,

		.flags	= IORESOURCE_IRQ,

	},

	{

		.start	= IRQ_CCERRINT,

		.flags	= IORESOURCE_IRQ,

	},

	/* not using TC*_ERR */

};



static struct platform_device dm646x_edma_device = {

	.name			= "edma",

	.id			= -1,

	.dev.platform_data	= &dm646x_edma_info,

	.num_resources		= ARRAY_SIZE(edma_resources),

	.resource		= edma_resources,

};



/*----------------------------------------------------------------------*/



void __init dm646x_init(void)

{

	davinci_clk_init(dm646x_clks);

	davinci_mux_register(dm646x_pins, ARRAY_SIZE(dm646x_pins));

}



static int __init dm646x_init_devices(void)

{

	if (!cpu_is_davinci_dm646x())

		return 0;



	platform_device_register(&dm646x_edma_device);

	return 0;

}

postcore_initcall(dm646x_init_devices);

arch/arm/mach-davinci/include/mach/dm646x.h

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/*

 * Chip specific defines for DM646x SoC

 *

 * Author: Kevin Hilman, Deep Root Systems, LLC

 *

 * 2007 (c) Deep Root Systems, LLC. This file is licensed under

 * the terms of the GNU General Public License version 2. This program

 * is licensed "as is" without any warranty of any kind, whether express

 * or implied.

 */

#ifndef __ASM_ARCH_DM646X_H

#define __ASM_ARCH_DM646X_H



#include <mach/hardware.h>



void __init dm646x_init(void);



#endif /* __ASM_ARCH_DM646X_H */