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Commit dde4c1bf authored by Gregory Herrero's avatar Gregory Herrero Committed by Felipe Balbi
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usb: dwc2: host: set active bit in isochronous descriptors



Active bit must be enabled in all scheduled descriptors. Else transfer
never start.
Remove previous code which was not correctly configuring descriptors.
Active bit was set before calling dwc2_fill_host_isoc_dma_desc() which
is erasing dma_desc->status.

Acked-by: default avatarJohn Youn <johnyoun@synopsys.com>
Signed-off-by: default avatarGregory Herrero <gregory.herrero@intel.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 3ac38d26
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+3 −8
Original line number Diff line number Diff line
@@ -524,6 +524,9 @@ static void dwc2_fill_host_isoc_dma_desc(struct dwc2_hsotg *hsotg,
	dma_desc->status = qh->n_bytes[idx] << HOST_DMA_ISOC_NBYTES_SHIFT &
			   HOST_DMA_ISOC_NBYTES_MASK;

	/* Set active bit */
	dma_desc->status |= HOST_DMA_A;

	qh->ntd++;
	qtd->isoc_frame_index_last++;

@@ -559,8 +562,6 @@ static void dwc2_init_isoc_dma_desc(struct dwc2_hsotg *hsotg,
	list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry) {
		while (qh->ntd < ntd_max && qtd->isoc_frame_index_last <
						qtd->urb->packet_count) {
			if (n_desc > 1)
				qh->desc_list[n_desc - 1].status |= HOST_DMA_A;
			dwc2_fill_host_isoc_dma_desc(hsotg, qtd, qh,
						     max_xfer_size, idx);
			idx = dwc2_desclist_idx_inc(idx, inc, qh->dev_speed);
@@ -606,12 +607,6 @@ static void dwc2_init_isoc_dma_desc(struct dwc2_hsotg *hsotg,

	qh->desc_list[idx].status |= HOST_DMA_IOC;
#endif

	if (n_desc) {
		qh->desc_list[n_desc - 1].status |= HOST_DMA_A;
		if (n_desc > 1)
			qh->desc_list[0].status |= HOST_DMA_A;
	}
}

static void dwc2_fill_host_dma_desc(struct dwc2_hsotg *hsotg,