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Commit dd503f66 authored by Victoria Milhoan's avatar Victoria Milhoan Committed by Herbert Xu
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ARM: clk-imx6q: Add CAAM clock support



Add CAAM clock support to the i.MX6 clocking infrastructure.

Signed-off-by: default avatarVictoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: default avatarHoria Geantă <horia.geanta@freescale.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent ff1a15d9
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+3 −0
Original line number Diff line number Diff line
@@ -381,6 +381,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
	clk[IMX6QDL_CLK_ASRC]         = imx_clk_gate2_shared("asrc",         "asrc_podf",   base + 0x68, 6, &share_count_asrc);
	clk[IMX6QDL_CLK_ASRC_IPG]     = imx_clk_gate2_shared("asrc_ipg",     "ahb",         base + 0x68, 6, &share_count_asrc);
	clk[IMX6QDL_CLK_ASRC_MEM]     = imx_clk_gate2_shared("asrc_mem",     "ahb",         base + 0x68, 6, &share_count_asrc);
	clk[IMX6QDL_CLK_CAAM_MEM]     = imx_clk_gate2("caam_mem",      "ahb",               base + 0x68, 8);
	clk[IMX6QDL_CLK_CAAM_ACLK]    = imx_clk_gate2("caam_aclk",     "ahb",               base + 0x68, 10);
	clk[IMX6QDL_CLK_CAAM_IPG]     = imx_clk_gate2("caam_ipg",      "ipg",               base + 0x68, 12);
	clk[IMX6QDL_CLK_CAN1_IPG]     = imx_clk_gate2("can1_ipg",      "ipg",               base + 0x68, 14);
	clk[IMX6QDL_CLK_CAN1_SERIAL]  = imx_clk_gate2("can1_serial",   "can_root",          base + 0x68, 16);
	clk[IMX6QDL_CLK_CAN2_IPG]     = imx_clk_gate2("can2_ipg",      "ipg",               base + 0x68, 18);
+4 −1
Original line number Diff line number Diff line
@@ -251,6 +251,9 @@
#define IMX6QDL_CLK_VIDEO_27M			238
#define IMX6QDL_CLK_MIPI_CORE_CFG		239
#define IMX6QDL_CLK_MIPI_IPG			240
#define IMX6QDL_CLK_END				241
#define IMX6QDL_CLK_CAAM_MEM			241
#define IMX6QDL_CLK_CAAM_ACLK			242
#define IMX6QDL_CLK_CAAM_IPG			243
#define IMX6QDL_CLK_END				244

#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */