drm/msm/dsi-staging: disable FIFO error interrupts in ESD

In ESD recovery sequence, there is high likelihood of encountering
DSI FIFO overflow/underflow errors which might put controller in
bad state. This change disables FIFO error interrupts prior to
attempting panel status read.

Change-Id: Ib4245241789f74b51ef06778df63cbae572f60e0
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>