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Commit c39998a1 authored by Mark's avatar Mark Committed by Greg Kroah-Hartman
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tty: serial: 8250: Revert NXP SC16C2552 workaround 



commit 47ac76662ca9c5852fd353093f19de3ae85f2e66 upstream.

Revert commit ecb988a3: tty: serial:
8250: 8250_core: NXP SC16C2552 workaround

The above commit causes userland application to no longer write
correctly its first write to a dumb terminal connected to /dev/ttyS0.
This commit seems to be the culprit. It's as though the TX FIFO is being
reset during that write. What should be displayed is:

PSW 80000000 INST 00000000                           HALT
//

What is displayed is some variation of:

T 00000000           HAL//

Reverting this commit via this patch fixes my problem.

Signed-off-by: default avatarMark Hounschell <dmarkh@cfl.rr.com>
Fixes: ecb988a3 ("tty: serial: 8250: 8250_core: NXP SC16C2552 workaround")
Cc: stable <stable@vger.kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent a469b811

drivers/tty/serial/8250/8250_port.c

+1 −2
Original line number Diff line number Diff line
@@ -83,8 +83,7 @@ static const struct serial8250_config uart_config[] = { 
		.name		= "16550A",

		.fifo_size	= 16,

		.tx_loadsz	= 16,

		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |

				  UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,

		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

		.rxtrig_bytes	= {1, 4, 8, 14},

		.flags		= UART_CAP_FIFO,

	},