Loading Documentation/devicetree/bindings/fb/mdss-pll.txt +1 −1 Original line number Diff line number Diff line Loading @@ -14,7 +14,7 @@ Required properties: "qcom,mdss_hdmi_pll_8996_v2", "qcom,mdss_dsi_pll_8996_v2", "qcom,mdss_hdmi_pll_8996_v3", "qcom,mdss_dsi_pll_8952", "qcom,mdss_dsi_pll_8937", "qcom,mdss_hdmi_pll_8996_v3_1p8", "qcom,mdss_dsi_pll_8953" "qcom,mdss_dsi_pll_8953", "qcom,mdss_dsi_pll_sdm439" - cell-index: Specifies the controller used - reg: offset and length of the register set for the device. - reg-names : names to refer to register sets related to this device Loading arch/arm64/boot/dts/qcom/sdm429.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -178,3 +178,14 @@ #clock-cells = <1>; }; }; &clock_gcc_mdss { compatible = "qcom,gcc-mdss-sdm429"; clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_src>, <&mdss_dsi0_pll clk_dsi0pll_byte_clk_src>, <&mdss_dsi1_pll clk_dsi1pll_pixel_clk_src>, <&mdss_dsi1_pll clk_dsi1pll_byte_clk_src>; clock-names = "pclk0_src", "byte0_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; }; arch/arm64/boot/dts/qcom/sdm439.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -261,3 +261,14 @@ vdd_hf_dig-supply = <&pm8953_s2_level_ao>; vdd_hf_pll-supply = <&pm8953_l7_ao>; }; &clock_gcc_mdss { compatible = "qcom,gcc-mdss-sdm439"; clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_src>, <&mdss_dsi0_pll clk_dsi0pll_byte_clk_src>, <&mdss_dsi1_pll clk_dsi1pll_pixel_clk_src>, <&mdss_dsi1_pll clk_dsi1pll_byte_clk_src>; clock-names = "pclk0_src", "byte0_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; }; drivers/clk/msm/mdss/Makefile +2 −0 Original line number Diff line number Diff line Loading @@ -5,3 +5,5 @@ obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-28lpm.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-8996.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-8996-util.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-8996.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-12nm.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-12nm-util.o drivers/clk/msm/mdss/mdss-dsi-pll-12nm-util.c 0 → 100644 +820 −0 File added.Preview size limit exceeded, changes collapsed. Show changes Loading
Documentation/devicetree/bindings/fb/mdss-pll.txt +1 −1 Original line number Diff line number Diff line Loading @@ -14,7 +14,7 @@ Required properties: "qcom,mdss_hdmi_pll_8996_v2", "qcom,mdss_dsi_pll_8996_v2", "qcom,mdss_hdmi_pll_8996_v3", "qcom,mdss_dsi_pll_8952", "qcom,mdss_dsi_pll_8937", "qcom,mdss_hdmi_pll_8996_v3_1p8", "qcom,mdss_dsi_pll_8953" "qcom,mdss_dsi_pll_8953", "qcom,mdss_dsi_pll_sdm439" - cell-index: Specifies the controller used - reg: offset and length of the register set for the device. - reg-names : names to refer to register sets related to this device Loading
arch/arm64/boot/dts/qcom/sdm429.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -178,3 +178,14 @@ #clock-cells = <1>; }; }; &clock_gcc_mdss { compatible = "qcom,gcc-mdss-sdm429"; clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_src>, <&mdss_dsi0_pll clk_dsi0pll_byte_clk_src>, <&mdss_dsi1_pll clk_dsi1pll_pixel_clk_src>, <&mdss_dsi1_pll clk_dsi1pll_byte_clk_src>; clock-names = "pclk0_src", "byte0_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; };
arch/arm64/boot/dts/qcom/sdm439.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -261,3 +261,14 @@ vdd_hf_dig-supply = <&pm8953_s2_level_ao>; vdd_hf_pll-supply = <&pm8953_l7_ao>; }; &clock_gcc_mdss { compatible = "qcom,gcc-mdss-sdm439"; clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_src>, <&mdss_dsi0_pll clk_dsi0pll_byte_clk_src>, <&mdss_dsi1_pll clk_dsi1pll_pixel_clk_src>, <&mdss_dsi1_pll clk_dsi1pll_byte_clk_src>; clock-names = "pclk0_src", "byte0_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; };
drivers/clk/msm/mdss/Makefile +2 −0 Original line number Diff line number Diff line Loading @@ -5,3 +5,5 @@ obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-28lpm.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-8996.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-8996-util.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-8996.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-12nm.o obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-12nm-util.o
drivers/clk/msm/mdss/mdss-dsi-pll-12nm-util.c 0 → 100644 +820 −0 File added.Preview size limit exceeded, changes collapsed. Show changes