Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b3b650b9 authored by Padmanabhan Komanduru's avatar Padmanabhan Komanduru
Browse files

ARM: dts: msm: add support for MDSS clocks for sdm439/sdm429



Add the DT node for GCC MDSS clock node for sdm439/sdm429. This
maps the parents of MDSS DSI RCG clocks with the corresponding
DSI PLL clocks.

Change-Id: I6b2d846be4a91546211564b3f36f9910b7dc62ee
Signed-off-by: default avatarPadmanabhan Komanduru <pkomandu@codeaurora.org>
parent c7438af6
Loading
Loading
Loading
Loading
+11 −0
Original line number Diff line number Diff line
@@ -178,3 +178,14 @@
		#clock-cells = <1>;
	};
};

&clock_gcc_mdss {
	compatible = "qcom,gcc-mdss-sdm429";
	clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_src>,
		 <&mdss_dsi0_pll clk_dsi0pll_byte_clk_src>,
		 <&mdss_dsi1_pll clk_dsi1pll_pixel_clk_src>,
		 <&mdss_dsi1_pll clk_dsi1pll_byte_clk_src>;
	clock-names = "pclk0_src", "byte0_src", "pclk1_src",
		"byte1_src";
	#clock-cells = <1>;
};
+11 −0
Original line number Diff line number Diff line
@@ -258,3 +258,14 @@
	vdd_hf_dig-supply = <&pm8953_s2_level_ao>;
	vdd_hf_pll-supply = <&pm8953_l7_ao>;
};

&clock_gcc_mdss {
	compatible = "qcom,gcc-mdss-sdm439";
	clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_src>,
		 <&mdss_dsi0_pll clk_dsi0pll_byte_clk_src>,
		 <&mdss_dsi1_pll clk_dsi1pll_pixel_clk_src>,
		 <&mdss_dsi1_pll clk_dsi1pll_byte_clk_src>;
	clock-names = "pclk0_src", "byte0_src", "pclk1_src",
		"byte1_src";
	#clock-cells = <1>;
};