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Commit bd96a43a authored by Maheshwar Ajja's avatar Maheshwar Ajja
Browse files

ARM: dts: msm: Add vcodec0 and vcodec1 axi clocks on sdm845 



Add video clocks (vcodec0_axi and vcodec1_axi) to execute
video usecases on sdm845.

CRs-Fixed: 2035342
Change-Id: Ibc5cd365a0245eea6b5ffc24085d2742f1653913
Signed-off-by: default avatarMaheshwar Ajja <majja@codeaurora.org>
parent fb8f000f

arch/arm64/boot/dts/qcom/sdm845-vidc.dtsi

+8 −4
Original line number Original line Diff line number Diff line
@@ -32,15 +32,19 @@ 




		/* Clocks */

		/* Clocks */

		clock-names = "core_clk", "iface_clk", "bus_clk",

		clock-names = "core_clk", "iface_clk", "bus_clk",

			"core0_clk", "core1_clk";

			"core0_clk", "core0_bus_clk",

			"core1_clk", "core1_bus_clk";

		clocks = <&clock_videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,

		clocks = <&clock_videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,

			<&clock_videocc VIDEO_CC_VENUS_AHB_CLK>,

			<&clock_videocc VIDEO_CC_VENUS_AHB_CLK>,

			<&clock_videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,

			<&clock_videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,

			<&clock_videocc VIDEO_CC_VCODEC0_CORE_CLK>,

			<&clock_videocc VIDEO_CC_VCODEC0_CORE_CLK>,

			<&clock_videocc VIDEO_CC_VCODEC1_CORE_CLK>;

			<&clock_videocc VIDEO_CC_VCODEC0_AXI_CLK>,

			<&clock_videocc VIDEO_CC_VCODEC1_CORE_CLK>,

			<&clock_videocc VIDEO_CC_VCODEC1_AXI_CLK>;

		qcom,proxy-clock-names = "core_clk", "iface_clk",

		qcom,proxy-clock-names = "core_clk", "iface_clk",

			"bus_clk", "core0_clk", "core1_clk";

			"bus_clk", "core0_clk", "core0_bus_clk",

		qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0>;

			"core1_clk", "core1_bus_clk";

		qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x0 0x0>;

		qcom,allowed-clock-rates = <200000000 320000000 380000000

		qcom,allowed-clock-rates = <200000000 320000000 380000000

			444000000 533000000>;

			444000000 533000000>;

		qcom,clock-freq-tbl {

		qcom,clock-freq-tbl {