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Commit b4672d37 authored by Ralf Baechle's avatar Ralf Baechle Committed by
Browse files

MIPS: Introduce machinery for testing for MIPSxxR1/2. 


    
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e7958bb9

arch/mips/kernel/cpu-probe.c

+30 −5
Original line number Diff line number Diff line
@@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) 
	}

}



static char unknown_isa[] __initdata = KERN_ERR \

	"Unsupported ISA type, c0.config0: %d.";



static inline unsigned int decode_config0(struct cpuinfo_mips *c)

{

	unsigned int config0;
@@ -446,17 +449,38 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c) 
		c->options |= MIPS_CPU_TLB;

	isa = (config0 & MIPS_CONF_AT) >> 13;

	switch (isa) {

	case 0:

		switch ((config0 >> 10) & 7) {

		case 0:

			c->isa_level = MIPS_CPU_ISA_M32R1;

			break;

		case 1:

			c->isa_level = MIPS_CPU_ISA_M32R2;

			break;

		default:

			goto unknown;

		}

		break;

	case 2:

		switch ((config0 >> 10) & 7) {

		case 0:

			c->isa_level = MIPS_CPU_ISA_M64R1;

			break;

		case 1:

			c->isa_level = MIPS_CPU_ISA_M64R2;

			break;

		default:

		panic("Unsupported ISA type, cp0.config0.at: %d.", isa);

			goto unknown;

		}

		break;

	default:

		goto unknown;

	}



	return config0 & MIPS_CONF_M;



unknown:

	panic(unknown_isa, config0);

}



static inline unsigned int decode_config1(struct cpuinfo_mips *c)
@@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) 
		break;

	case PRID_IMP_34K:

		c->cputype = CPU_34K;

		c->isa_level = MIPS_CPU_ISA_M32R1;

		break;

	}

}
@@ -691,7 +714,9 @@ __init void cpu_probe(void) 
		c->fpu_id = cpu_get_fpu_id();



		if (c->isa_level == MIPS_CPU_ISA_M32R1 ||

		    c->isa_level == MIPS_CPU_ISA_M64R1) {

		    c->isa_level == MIPS_CPU_ISA_M32R2 ||

		    c->isa_level == MIPS_CPU_ISA_M64R1 ||

		    c->isa_level == MIPS_CPU_ISA_M64R2) {

			if (c->fpu_id & MIPS_FPIR_3D)

				c->ases |= MIPS_ASE_MIPS3D;

		}

arch/mips/kernel/time.c

+3 −3
Original line number Diff line number Diff line
@@ -628,7 +628,7 @@ void __init time_init(void) 
			mips_hpt_init = c0_hpt_init;

		}



		if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32R1) ||

		if (cpu_has_mips32r1 || cpu_has_mips32r2 ||

		    (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||

		    (current_cpu_data.isa_level == MIPS_CPU_ISA_II))

			/*

include/asm-mips/cpu-features.h

+24 −0
Original line number Diff line number Diff line
@@ -144,6 +144,18 @@ 
# ifndef cpu_has_64bit_addresses

# define cpu_has_64bit_addresses	0

# endif

# ifndef cpu_has_mips32r1

# define cpu_has_mips32r1	(cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)

# endif

# ifndef cpu_has_mips32r2

# define cpu_has_mips32r2	(cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)

# endif

# ifndef cpu_has_mips64r1

# define cpu_has_mips64r1	0

# endif

# ifndef cpu_has_mips64r2

# define cpu_has_mips64r2	0

# endif

#endif



#ifdef CONFIG_64BIT
@@ -162,6 +174,18 @@ 
# ifndef cpu_has_64bit_addresses

# define cpu_has_64bit_addresses	1

# endif

# ifndef cpu_has_mips32r1

# define cpu_has_mips32r1	0

# endif

# ifndef cpu_has_mips32r2

# define cpu_has_mips32r2	0

# endif

# ifndef cpu_has_mips64r1

# define cpu_has_mips64r1	(cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)

# endif

# ifndef cpu_has_mips64r2

# define cpu_has_mips64r2	(cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)

# endif

#endif



#ifdef CONFIG_CPU_MIPSR2

include/asm-mips/cpu.h

+3 −1
Original line number Diff line number Diff line
@@ -210,7 +210,9 @@ 
#define MIPS_CPU_ISA_IV		(0x00000004 | MIPS_CPU_ISA_64BIT)

#define MIPS_CPU_ISA_V		(0x00000005 | MIPS_CPU_ISA_64BIT)

#define MIPS_CPU_ISA_M32R1	0x00000020

#define MIPS_CPU_ISA_M64R1	(0x00000040 | MIPS_CPU_ISA_64BIT)

#define MIPS_CPU_ISA_M32R2	0x00000040

#define MIPS_CPU_ISA_M64R1	(0x00000080 | MIPS_CPU_ISA_64BIT)

#define MIPS_CPU_ISA_M64R2	(0x00000100 | MIPS_CPU_ISA_64BIT)



/*

 * CPU Option encodings

include/asm-mips/mach-ip22/cpu-feature-overrides.h

+5 −0
Original line number Diff line number Diff line
@@ -34,4 +34,9 @@ 
#define cpu_has_nofpuex		0

#define cpu_has_64bits		1



#define cpu_has_mips32r1	0

#define cpu_has_mips32r2	0

#define cpu_has_mips64r1	0

#define cpu_has_mips64r2	0



#endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */