Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ad758d5d authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "drm/msm/sde: update dim layer color configuration" into msm-4.9

parents dc6d5673 f56a73a1

drivers/gpu/drm/msm/sde/sde_hw_lm.c

+12 −7
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ static inline int _stage_offset(struct sde_hw_mixer *ctx, enum sde_stage stage) 
	if (stage == SDE_STAGE_BASE)

		rc = -EINVAL;

	else if (stage <= sblk->maxblendstages)

		rc = sblk->blendstage_base[stage - 1];

		rc = sblk->blendstage_base[stage - SDE_STAGE_0];

	else

		rc = -EINVAL;
@@ -198,7 +198,7 @@ static void sde_hw_lm_setup_dim_layer(struct sde_hw_mixer *ctx, 
{

	struct sde_hw_blk_reg_map *c = &ctx->hw;

	int stage_off;

	u32 val = 0;

	u32 val = 0, alpha = 0;



	stage_off = _stage_offset(ctx, dim_layer->stage);

	if (stage_off < 0) {
@@ -206,13 +206,13 @@ static void sde_hw_lm_setup_dim_layer(struct sde_hw_mixer *ctx, 
		return;

	}



	val = (dim_layer->color_fill.color_1 & 0xFFF) << 16 |

			(dim_layer->color_fill.color_0 & 0xFFF);

	alpha = dim_layer->color_fill.color_3 & 0xFF;

	val = ((dim_layer->color_fill.color_1 << 2) & 0xFFF) << 16 |

			((dim_layer->color_fill.color_0 << 2) & 0xFFF);

	SDE_REG_WRITE(c, LM_FG_COLOR_FILL_COLOR_0 + stage_off, val);



	val = 0;

	val = (dim_layer->color_fill.color_3 & 0xFFF) << 16 |

			(dim_layer->color_fill.color_2 & 0xFFF);

	val = (alpha << 4) << 16 |

			((dim_layer->color_fill.color_2 << 2) & 0xFFF);

	SDE_REG_WRITE(c, LM_FG_COLOR_FILL_COLOR_1 + stage_off, val);



	val = dim_layer->rect.h << 16 | dim_layer->rect.w;
@@ -222,9 +222,14 @@ static void sde_hw_lm_setup_dim_layer(struct sde_hw_mixer *ctx, 
	SDE_REG_WRITE(c, LM_FG_COLOR_FILL_XY + stage_off, val);



	val = BIT(16); /* enable dim layer */

	val |= SDE_BLEND_FG_ALPHA_FG_CONST | SDE_BLEND_BG_ALPHA_BG_CONST;

	if (dim_layer->flags & SDE_DRM_DIM_LAYER_EXCLUSIVE)

		val |= BIT(17);

	else

		val &= ~BIT(17);

	SDE_REG_WRITE(c, LM_BLEND0_OP + stage_off, val);

	val = (alpha << 16) | (0xff - alpha);

	SDE_REG_WRITE(c, LM_BLEND0_CONST_ALPHA + stage_off, val);

}



static void sde_hw_lm_setup_misr(struct sde_hw_mixer *ctx,