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Commit abda5334 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'omap-for-v4.8/dt-part1-signed-v2' of...

Merge tag 'omap-for-v4.8/dt-part1-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Device tree changes for omaps for v4.8 merge window:

- PWM binding updates and related dts changes
- OCM RAM updates for dra7
- Enable n900 lirc-rx51 driver
- omap3-gta04 updates for backlight, bma180, itg3200, hmc5843 and wifi
- am335x, am437x and am57xx operating point updates and additions
- am335x-icev2 pca9536 node
- dra72-evm regulator updates
- edma spelling fixes
- am335x and am437x ethernet phy update
- a series of mcbsp updates
- omap3-gta04 eeprom
- dra7 PCIe unit address fix
- stdout-path for beaglebone variants
- crypto accelerator nodes for am335x, am437x and dra7

* tag 'omap-for-v4.8/dt-part1-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

: (42 commits)
  ARM: dts: AM43xx: Add node for RNG
  ARM: dts: AM43xx: clk: Add RNG clk node
  ARM: dts: DRA7: Add DT node for RNG IP
  ARM: dts: DRA7: Add support for SHA IP
  ARM: dts: DRA7: Add DT nodes for AES IP
  ARM: dts: DRA7: Add DT node for DES IP
  ARM: dts: am335x-bone-common: use stdout-path in Beaglebone boards.
  ARM: dts: DRA7: fix unit address of second PCIe instance
  ARM: dts: omap3-gta04: Add RFID eeprom node
  ARM: dts: omap4-duovero: Add pdmclk binding for audio
  ARM: dts: omap4-var-som-om44: Add pdmclk binding for audio
  ARM: dts: omap4-sdp: Add pdmclk binding for audio
  ARM: dts: omap4-panda-common: Add pdmclk binding for audio
  ARM: dts: omap5-board-common: Add pdmclk binding for audio
  ARM: dts: omap3: Add clocks to McBSP nodes
  ARM: dts: am335x-bone-common: Mark MAC as having only one PHY
  ARM: dts: am437x-idk-evm: Mark MAC as having only one PHY
  ARM: dts: Correct misspelling, "emda3" -> "edma3"
  ARM: dts: dra72-evm: Rename 3.3V regulator tag
  ARM: dts: am335x-icev2: Add DT node for TI PCA9536
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 35902cf1 52c7c913
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+2 −2
Original line number Original line Diff line number Diff line
@@ -15,7 +15,7 @@ Required properties:
- reg:		Memory map of eDMA CC
- reg:		Memory map of eDMA CC
- reg-names:	"edma3_cc"
- reg-names:	"edma3_cc"
- interrupts:	Interrupt lines for CCINT, MPERR and CCERRINT.
- interrupts:	Interrupt lines for CCINT, MPERR and CCERRINT.
- interrupt-names: "edma3_ccint", "emda3_mperr" and "edma3_ccerrint"
- interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
- ti,tptcs:	List of TPTCs associated with the eDMA in the following form:
- ti,tptcs:	List of TPTCs associated with the eDMA in the following form:
		<&tptc_phandle TC_priority_number>. The highest priority is 0.
		<&tptc_phandle TC_priority_number>. The highest priority is 0.


@@ -48,7 +48,7 @@ edma: edma@49000000 {
	reg =	<0x49000000 0x10000>;
	reg =	<0x49000000 0x10000>;
	reg-names = "edma3_cc";
	reg-names = "edma3_cc";
	interrupts = <12 13 14>;
	interrupts = <12 13 14>;
	interrupt-names = "edma3_ccint", "emda3_mperr", "edma3_ccerrint";
	interrupt-names = "edma3_ccint", "edma3_mperr", "edma3_ccerrint";
	dma-requests = <64>;
	dma-requests = <64>;
	#dma-cells = <2>;
	#dma-cells = <2>;


+29 −9
Original line number Original line Diff line number Diff line
@@ -2,28 +2,48 @@ TI SOC ECAP based APWM controller


Required properties:
Required properties:
- compatible: Must be "ti,<soc>-ecap".
- compatible: Must be "ti,<soc>-ecap".
  for am33xx - compatible = "ti,am33xx-ecap";
  for am33xx - compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
  for da850  - compatible = "ti,da850-ecap", "ti,am33xx-ecap";
  for am4372 - compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
  for da850  - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
  for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
  the cells format. The PWM channel index ranges from 0 to 4. The only third
  the cells format. The PWM channel index ranges from 0 to 4. The only third
  cell flag supported by this binding is PWM_POLARITY_INVERTED.
  cell flag supported by this binding is PWM_POLARITY_INVERTED.
- reg: physical base address and size of the registers map.
- reg: physical base address and size of the registers map.


Optional properties:
Optional properties:
- ti,hwmods: Name of the hwmod associated to the ECAP:
- clocks: Handle to the ECAP's functional clock.
  "ecap<x>", <x> being the 0-based instance number from the HW spec
- clock-names: Must be set to "fck".


Example:
Example:


ecap0: ecap@0 { /* ECAP on am33xx */
ecap0: ecap@48300100 { /* ECAP on am33xx */
	compatible = "ti,am33xx-ecap";
	compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
	#pwm-cells = <3>;
	reg = <0x48300100 0x80>;
	clocks = <&l4ls_gclk>;
	clock-names = "fck";
};

ecap0: ecap@48300100 { /* ECAP on am4372 */
	compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
	#pwm-cells = <3>;
	#pwm-cells = <3>;
	reg = <0x48300100 0x80>;
	reg = <0x48300100 0x80>;
	ti,hwmods = "ecap0";
	ti,hwmods = "ecap0";
	clocks = <&l4ls_gclk>;
	clock-names = "fck";
};

ecap0: ecap@1f06000 { /* ECAP on da850 */
	compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
	#pwm-cells = <3>;
	reg = <0x1f06000 0x80>;
};
};


ecap0: ecap@0 { /* ECAP on da850 */
ecap0: ecap@4843e100 {
	compatible = "ti,da850-ecap", "ti,am33xx-ecap";
	compatible = "ti,dra746-ecap", "ti,am3352-ecap";
	#pwm-cells = <3>;
	#pwm-cells = <3>;
	reg = <0x306000 0x80>;
	reg = <0x4843e100 0x80>;
	clocks = <&l4_root_clk_div>;
	clock-names = "fck";
};
};
+29 −9
Original line number Original line Diff line number Diff line
@@ -2,28 +2,48 @@ TI SOC EHRPWM based PWM controller


Required properties:
Required properties:
- compatible: Must be "ti,<soc>-ehrpwm".
- compatible: Must be "ti,<soc>-ehrpwm".
  for am33xx - compatible = "ti,am33xx-ehrpwm";
  for am33xx  - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
  for da850  - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
  for am4372  - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
  for da850   - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
  for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
  the cells format. The only third cell flag supported by this binding is
  the cells format. The only third cell flag supported by this binding is
  PWM_POLARITY_INVERTED.
  PWM_POLARITY_INVERTED.
- reg: physical base address and size of the registers map.
- reg: physical base address and size of the registers map.


Optional properties:
Optional properties:
- ti,hwmods: Name of the hwmod associated to the EHRPWM:
- clocks: Handle to the PWM's time-base and functional clock.
  "ehrpwm<x>", <x> being the 0-based instance number from the HW spec
- clock-names: Must be set to "tbclk" and "fck".


Example:
Example:


ehrpwm0: ehrpwm@0 { /* EHRPWM on am33xx */
ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */
	compatible = "ti,am33xx-ehrpwm";
	compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
	#pwm-cells = <3>;
	#pwm-cells = <3>;
	reg = <0x48300200 0x100>;
	reg = <0x48300200 0x100>;
	clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
	clock-names = "tbclk", "fck";
};

ehrpwm0: pwm@48300200 { /* EHRPWM on am4372 */
	compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
	#pwm-cells = <3>;
	reg = <0x48300200 0x80>;
	clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
	clock-names = "tbclk", "fck";
	ti,hwmods = "ehrpwm0";
	ti,hwmods = "ehrpwm0";
};
};


ehrpwm0: ehrpwm@0 { /* EHRPWM on da850 */
ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */
	compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
	compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
	#pwm-cells = <3>;
	reg = <0x1f00000 0x2000>;
};

ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */
	compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm";
	#pwm-cells = <3>;
	#pwm-cells = <3>;
	reg = <0x300000 0x2000>;
	reg = <0x4843e200 0x80>;
	clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;
	clock-names = "tbclk", "fck";
};
};
+31 −2
Original line number Original line Diff line number Diff line
TI SOC based PWM Subsystem
TI SOC based PWM Subsystem


Required properties:
Required properties:
- compatible: Must be "ti,am33xx-pwmss";
- compatible: Must be "ti,<soc>-pwmss".
  for am33xx  - compatible = "ti,am33xx-pwmss";
  for am4372  - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
  for dra746 - compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"

- reg: physical base address and size of the registers map.
- reg: physical base address and size of the registers map.
- address-cells: Specify the number of u32 entries needed in child nodes.
- address-cells: Specify the number of u32 entries needed in child nodes.
		  Should set to 1.
		  Should set to 1.
@@ -16,7 +20,7 @@ Required properties:
Also child nodes should also populated under PWMSS DT node.
Also child nodes should also populated under PWMSS DT node.


Example:
Example:
pwmss0: pwmss@48300000 {
epwmss0: epwmss@48300000 { /* PWMSS for am33xx */
	compatible = "ti,am33xx-pwmss";
	compatible = "ti,am33xx-pwmss";
	reg = <0x48300000 0x10>;
	reg = <0x48300000 0x10>;
	ti,hwmods = "epwmss0";
	ti,hwmods = "epwmss0";
@@ -29,3 +33,28 @@ pwmss0: pwmss@48300000 {


	/* child nodes go here */
	/* child nodes go here */
};
};

epwmss0: epwmss@48300000 { /* PWMSS for am4372 */
	compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"
	reg = <0x48300000 0x10>;
	ti,hwmods = "epwmss0";
	#address-cells = <1>;
	#size-cells = <1>;
	status = "disabled";
	ranges = <0x48300100 0x48300100 0x80   /* ECAP */
		  0x48300180 0x48300180 0x80   /* EQEP */
		  0x48300200 0x48300200 0x80>; /* EHRPWM */

	/* child nodes go here */
};

epwmss0: epwmss@4843e000 { /* PWMSS for DRA7xx */
	compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
	reg = <0x4843e000 0x30>;
	ti,hwmods = "epwmss0";
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	/* child nodes go here */
};
+6 −6
Original line number Original line Diff line number Diff line
@@ -18,6 +18,10 @@
		reg = <0x80000000 0x10000000>; /* 256 MB */
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};
	};


	chosen {
		stdout-path = &uart0;
	};

	leds {
	leds {
		pinctrl-names = "default";
		pinctrl-names = "default";
		pinctrl-0 = <&user_leds_s0>;
		pinctrl-0 = <&user_leds_s0>;
@@ -318,7 +322,7 @@
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <925000>;
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1325000>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-boot-on;
			regulator-always-on;
			regulator-always-on;
		};
		};
@@ -359,12 +363,8 @@
	phy-mode = "mii";
	phy-mode = "mii";
};
};


&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "mii";
};

&mac {
&mac {
	slaves = <1>;
	pinctrl-names = "default", "sleep";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	pinctrl-1 = <&cpsw_sleep>;
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