Loading arch/arm64/boot/dts/qcom/sdm845.dtsi +32 −0 Original line number Diff line number Diff line Loading @@ -3874,6 +3874,38 @@ interrupt-names = "tsens-upper-lower", "tsens-critical"; #thermal-sensor-cells = <1>; }; gpi_dma0: qcom,gpi-dma@0x800000 { #dma-cells = <6>; compatible = "qcom,gpi-dma"; reg = <0x800000 0x60000>; reg-names = "gpi-top"; interrupts = <0 244 0>, <0 245 0>, <0 246 0>, <0 247 0>, <0 248 0>, <0 249 0>, <0 250 0>, <0 251 0>, <0 252 0>, <0 253 0>, <0 254 0>, <0 255 0>, <0 256 0>; qcom,max-num-gpii = <13>; qcom,gpii-mask = <0xfa>; qcom,ev-factor = <2>; iommus = <&apps_smmu 0x0016 0x0>; status = "ok"; }; gpi_dma1: qcom,gpi-dma@0xa00000 { #dma-cells = <6>; compatible = "qcom,gpi-dma"; reg = <0xa00000 0x60000>; reg-names = "gpi-top"; interrupts = <0 279 0>, <0 280 0>, <0 281 0>, <0 282 0>, <0 283 0>, <0 284 0>, <0 293 0>, <0 294 0>, <0 295 0>, <0 296 0>, <0 297 0>, <0 298 0>, <0 299 0>; qcom,max-num-gpii = <13>; qcom,gpii-mask = <0xfa>; qcom,ev-factor = <2>; iommus = <&apps_smmu 0x06d6 0x0>; status = "ok"; }; }; &clock_cpucc { Loading Loading
arch/arm64/boot/dts/qcom/sdm845.dtsi +32 −0 Original line number Diff line number Diff line Loading @@ -3874,6 +3874,38 @@ interrupt-names = "tsens-upper-lower", "tsens-critical"; #thermal-sensor-cells = <1>; }; gpi_dma0: qcom,gpi-dma@0x800000 { #dma-cells = <6>; compatible = "qcom,gpi-dma"; reg = <0x800000 0x60000>; reg-names = "gpi-top"; interrupts = <0 244 0>, <0 245 0>, <0 246 0>, <0 247 0>, <0 248 0>, <0 249 0>, <0 250 0>, <0 251 0>, <0 252 0>, <0 253 0>, <0 254 0>, <0 255 0>, <0 256 0>; qcom,max-num-gpii = <13>; qcom,gpii-mask = <0xfa>; qcom,ev-factor = <2>; iommus = <&apps_smmu 0x0016 0x0>; status = "ok"; }; gpi_dma1: qcom,gpi-dma@0xa00000 { #dma-cells = <6>; compatible = "qcom,gpi-dma"; reg = <0xa00000 0x60000>; reg-names = "gpi-top"; interrupts = <0 279 0>, <0 280 0>, <0 281 0>, <0 282 0>, <0 283 0>, <0 284 0>, <0 293 0>, <0 294 0>, <0 295 0>, <0 296 0>, <0 297 0>, <0 298 0>, <0 299 0>; qcom,max-num-gpii = <13>; qcom,gpii-mask = <0xfa>; qcom,ev-factor = <2>; iommus = <&apps_smmu 0x06d6 0x0>; status = "ok"; }; }; &clock_cpucc { Loading