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Commit a50d8085 authored by Jitendra Sharma's avatar Jitendra Sharma Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add support for wcnss PIL on msm8953 



Add support for wcnss PIL which facilitates the loading
of wcnss firmware, authentication and bringing it
out of reset.

Change-Id: Ie7978c4f08d4d3bf61823e3b4956a8664b2dd64e
Signed-off-by: default avatarJitendra Sharma <shajit@codeaurora.org>
parent c5c3197b

arch/arm64/boot/dts/qcom/msm8953.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -1483,6 +1483,37 @@ 


		memory-region = <&adsp_fw_mem>;

	};



	qcom,pronto@a21b000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x0a21b000 0x3000>;

		interrupts = <0 149 1>;



		vdd_pronto_pll-supply = <&pm8953_l7>;

		proxy-reg-names = "vdd_pronto_pll";

		vdd_pronto_pll-uV-uA = <1800000 18000>;

		clocks = <&clock_gcc clk_xo_pil_pronto_clk>,

			 <&clock_gcc clk_gcc_crypto_clk>,

			 <&clock_gcc clk_gcc_crypto_ahb_clk>,

			 <&clock_gcc clk_gcc_crypto_axi_clk>,

			 <&clock_gcc clk_crypto_clk_src>;



		clock-names = "xo", "scm_core_clk", "scm_iface_clk",

				"scm_bus_clk", "scm_core_clk_src";

		qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk",

				 "scm_bus_clk", "scm_core_clk_src";

		qcom,scm_core_clk_src = <80000000>;



		qcom,pas-id = <6>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <422>;

		qcom,sysmon-id = <6>;

		qcom,ssctl-instance-id = <0x13>;

		qcom,firmware-name = "wcnss";



		memory-region = <&wcnss_fw_mem>;

	};



};



#include "pm8953-rpm-regulator.dtsi"