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Commit c5c3197b authored by Jitendra Sharma's avatar Jitendra Sharma
Browse files

ARM: dts: msm: Add support for Lpass PIL on msm8953 



Add support for Lpass PIL which facilitates the loading
of Lpass firmware, authentication and bringing it
out of reset.

Change-Id: I2900124ff45120b52b246eec603b4e3375ecd635
Signed-off-by: default avatarJitendra Sharma <shajit@codeaurora.org>
parent 7662b4eb

arch/arm64/boot/dts/qcom/msm8953.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -1452,6 +1452,37 @@ 
		reg = <0x070f8000 0x300>;

		qcom,reset-ep-after-lpm-resume;

	};



	qcom,lpass@c200000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0xc200000 0x00100>;

		interrupts = <0 293 1>;



		vdd_cx-supply = <&pm8953_s2_level>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&clock_gcc clk_xo_pil_lpass_clk>,

			 <&clock_gcc clk_gcc_crypto_clk>,

			 <&clock_gcc clk_gcc_crypto_ahb_clk>,

			 <&clock_gcc clk_gcc_crypto_axi_clk>,

			 <&clock_gcc clk_crypto_clk_src>;

		clock-names = "xo", "scm_core_clk", "scm_iface_clk",

				"scm_bus_clk", "scm_core_clk_src";

		qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk",

				 "scm_bus_clk", "scm_core_clk_src";

		qcom,scm_core_clk_src-freq = <80000000>;



		qcom,pas-id = <1>;

		qcom,complete-ramdump;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <423>;

		qcom,sysmon-id = <1>;

		qcom,ssctl-instance-id = <0x14>;

		qcom,firmware-name = "adsp";



		memory-region = <&adsp_fw_mem>;

	};

};



#include "pm8953-rpm-regulator.dtsi"