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Commit a37571a2 authored by Linus Torvalds's avatar Linus Torvalds
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Pull pin control updates from Linus Walleij:
 "This kernel cycle was quite calm when it comes to pin control and
  there is really just one major change, and that is the introduction of
  devm_pinctrl_register() managed resources.

  Apart from that linear development, details below.

  Core changes:

   - Add the devm_pinctrl_register() API and switch all applicable
     drivers to use it, saving lots of lines of code all over the place.

  New drivers:

   - driver for the Broadcom NS2 SoC

   - subdriver for the PXA25x SoCs

   - subdriver for the AMLogic Meson GXBB SoC

  Driver improvements:

   - the Intel Baytrail driver now properly supports pin control

   - Nomadik, Rockchip, Broadcom BCM2835 support the .get_direction()
     callback in the GPIO portions

   - continued development and stabilization of several SH-PFC SoC
     subdrivers: r8a7795, r8a7790, r8a7794 etc"

* tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (85 commits)
  Revert "pinctrl: tegra: avoid parked_reg and parked_bank"
  pinctrl: meson: Fix eth_tx_en bit index
  pinctrl: tegra: avoid parked_reg and parked_bank
  pinctrl: tegra: Correctly check the supported configuration
  pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC
  pinctrl: rockchip: fix pull setting error for rk3399
  pinctrl: stm32: Implement .pin_config_dbg_show()
  pinctrl: nomadik: hide nmk_gpio_get_mode when unused
  pinctrl: ns2: rename pinctrl_utils_dt_free_map
  pinctrl: at91: Merge clk_prepare and clk_enable into clk_prepare_enable
  pinctrl: at91: Make at91_gpio_template const
  pinctrl: baytrail: fix some error handling in debugfs
  pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC
  pinctrl: sirf/atlas7: trivial fix of spelling mistake on flagged
  pinctrl: sh-pfc: Kill unused variable in sh_pfc_remove()
  pinctrl: nomadik: implement .get_direction()
  pinctrl: nomadik: use BIT() with offsets consequently
  pinctrl: exynos5440: Use off-stack memory for pinctrl_gpio_range
  pinctrl: zynq: Use devm_pinctrl_register() for pinctrl registration
  pinctrl: u300: Use devm_pinctrl_register() for pinctrl registration
  ...
parents a0d3c7c5 0d535833
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+2 −2
Original line number Diff line number Diff line
@@ -72,8 +72,8 @@ Pin Configuration Node Properties:

The pin configuration parameters use the generic pinconf bindings defined in
pinctrl-bindings.txt in this directory. The supported parameters are
bias-disable, bias-pull-up, bias-pull-down and power-source. For pins that
have a configurable I/O voltage, the power-source value should be the
bias-disable, bias-pull-up, bias-pull-down, drive strength and power-source. For
pins that have a configurable I/O voltage, the power-source value should be the
nominal I/O voltage in millivolts.


+2 −0
Original line number Diff line number Diff line
@@ -328,6 +328,8 @@ PHY
PINCTRL
  devm_pinctrl_get()
  devm_pinctrl_put()
  devm_pinctrl_register()
  devm_pinctrl_unregister()

PWM
  devm_pwm_get()
+13 −0
Original line number Diff line number Diff line
@@ -86,3 +86,16 @@ config PINCTRL_NSP_GPIO
	  The ChipcommonA GPIO controller support basic PINCONF functions such
	  as bias pull up, pull down, and drive strength configurations, when
	  these pins are muxed to GPIO.

config PINCTRL_NS2_MUX
	bool "Broadcom Northstar2 pinmux driver"
	depends on OF
	depends on ARCH_BCM_IPROC || COMPILE_TEST
	select PINMUX
	select GENERIC_PINCONF
	default ARM64 && ARCH_BCM_IPROC
	help
	  Say yes here to enable the Broadcom NS2 MUX driver.

	  The Broadcom Northstar2 IOMUX driver supports group based IOMUX
	  configuration.
+1 −0
Original line number Diff line number Diff line
@@ -5,3 +5,4 @@ obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o
obj-$(CONFIG_PINCTRL_IPROC_GPIO)	+= pinctrl-iproc-gpio.o
obj-$(CONFIG_PINCTRL_CYGNUS_MUX)	+= pinctrl-cygnus-mux.o
obj-$(CONFIG_PINCTRL_NSP_GPIO)		+= pinctrl-nsp-gpio.o
obj-$(CONFIG_PINCTRL_NS2_MUX)		+= pinctrl-ns2-mux.o
+2 −4
Original line number Diff line number Diff line
@@ -1024,7 +1024,7 @@ static struct pinctrl_ops bcm281xx_pinctrl_ops = {
	.get_group_pins = bcm281xx_pinctrl_get_group_pins,
	.pin_dbg_show = bcm281xx_pinctrl_pin_dbg_show,
	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
	.dt_free_map = pinctrl_utils_dt_free_map,
	.dt_free_map = pinctrl_utils_free_map,
};

static int bcm281xx_pinctrl_get_fcns_count(struct pinctrl_dev *pctldev)
@@ -1422,9 +1422,7 @@ static int __init bcm281xx_pinctrl_probe(struct platform_device *pdev)
	bcm281xx_pinctrl_desc.pins = bcm281xx_pinctrl.pins;
	bcm281xx_pinctrl_desc.npins = bcm281xx_pinctrl.npins;

	pctl = pinctrl_register(&bcm281xx_pinctrl_desc,
				&pdev->dev,
				pdata);
	pctl = devm_pinctrl_register(&pdev->dev, &bcm281xx_pinctrl_desc, pdata);
	if (IS_ERR(pctl)) {
		dev_err(&pdev->dev, "Failed to register pinctrl\n");
		return PTR_ERR(pctl);
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