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Commit 9eabf478 authored by Jing Zhou's avatar Jing Zhou
Browse files

msm: camera: isp: Resolve issues for ISP RDI resources



This change resolves multiple RDI resource acquire/release issue,
incorrect RDI buffer size calculation, and adds check for pipeline delay.

Change-Id: Ic7546f9135d62c918efd65fdb54a907e518bf862
Signed-off-by: default avatarJing Zhou <jzhou70@codeaurora.org>
parent d74f480e
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+19 −2
Original line number Diff line number Diff line
@@ -490,6 +490,7 @@ static int __cam_isp_ctx_apply_req_in_activated_state(
	uint32_t next_state)
{
	int rc = 0;
	int cnt = 0;
	struct cam_ctx_request          *req;
	struct cam_isp_ctx_req          *req_isp;
	struct cam_isp_context          *ctx_isp;
@@ -501,6 +502,22 @@ static int __cam_isp_ctx_apply_req_in_activated_state(
		rc = -EFAULT;
		goto end;
	}

	/*
	 * When the pipeline has issue, the requests can be queued up in the
	 * pipeline. In this case, we should reject the additional request.
	 * The maximum number of request allowed to be outstanding is 2.
	 *
	 */
	list_for_each_entry(req, &ctx->active_req_list, list) {
		if (++cnt > 2) {
			pr_err("%s: Apply failed due to pipeline congestion\n",
				__func__);
			rc = -EFAULT;
			goto end;
		}
	}

	req = list_first_entry(&ctx->pending_req_list, struct cam_ctx_request,
		list);

@@ -1165,8 +1182,8 @@ static int __cam_isp_ctx_handle_irq_in_activated(void *context,
		(struct cam_isp_context *)ctx->ctx_priv;

	spin_lock(&ctx->lock);
	CDBG("%s: Enter: State %d Substate %d\n",
		__func__, ctx->state, ctx_isp->substate_activated);
	CDBG("%s: Enter: State %d, Substate %d, evt id %d\n",
		__func__, ctx->state, ctx_isp->substate_activated, evt_id);
	if (ctx_isp->substate_machine_irq[ctx_isp->substate_activated].
		irq_ops[evt_id]) {
		rc = ctx_isp->substate_machine_irq[ctx_isp->substate_activated].
+4 −1
Original line number Diff line number Diff line
@@ -2310,9 +2310,12 @@ static int cam_ife_hw_mgr_handle_rup_for_camif_hw_res(
				isp_ife_camif_res->res_id);
		}

		if (!rup_status)
		/* only do callback for pixel reg update for now */
		if (!rup_status && (isp_ife_camif_res->res_id ==
			CAM_ISP_HW_VFE_IN_CAMIF)) {
			ife_hwr_irq_rup_cb(ife_hwr_mgr_ctx->common.cb_priv,
				CAM_ISP_HW_EVENT_REG_UPDATE, &rup_event_data);
		}

	}

+2 −2
Original line number Diff line number Diff line
@@ -670,10 +670,10 @@ static int cam_vfe_bus_start_wm(struct cam_isp_resource_node *wm_res)
	cam_io_w(0xf, common_data->mem_base + rsrc_data->hw_regs->burst_limit);

	if (rsrc_data->index < 3) {
		width = rsrc_data->width * 5/4;
		width = rsrc_data->width * 5/4 * rsrc_data->height;
		height = 1;
		pack_fmt = 0x0;
		stride = rsrc_data->width * 5/4;
		stride = rsrc_data->width * 5/4 * rsrc_data->height;
		en_cfg = 0x3;
	} else if (rsrc_data->index < 5) {
		width = rsrc_data->width;
+5 −7
Original line number Diff line number Diff line
@@ -235,12 +235,12 @@ int cam_vfe_top_release(void *device_priv,
	top_priv = (struct cam_vfe_top_ver2_priv   *)device_priv;
	mux_res = (struct cam_isp_resource_node *)release_args;

	if (mux_res->res_state != CAM_ISP_RESOURCE_STATE_RESERVED) {
	CDBG("%s: Resource in state %d\n", __func__, mux_res->res_state);
	if (mux_res->res_state < CAM_ISP_RESOURCE_STATE_RESERVED) {
		pr_err("Error! Resource in Invalid res_state :%d\n",
			mux_res->res_state);
		return -EINVAL;
	}

	mux_res->res_state = CAM_ISP_RESOURCE_STATE_AVAILABLE;

	return 0;
@@ -290,12 +290,10 @@ int cam_vfe_top_stop(void *device_priv,
	top_priv = (struct cam_vfe_top_ver2_priv   *)device_priv;
	mux_res = (struct cam_isp_resource_node *)stop_args;

	if (mux_res->res_id == CAM_ISP_HW_VFE_IN_CAMIF) {
	if (mux_res->res_id == CAM_ISP_HW_VFE_IN_CAMIF ||
		(mux_res->res_id >= CAM_ISP_HW_VFE_IN_RDI0 &&
		mux_res->res_id <= CAM_ISP_HW_VFE_IN_RDI3)) {
		rc = mux_res->stop(mux_res);
	} else if (mux_res->res_id >= CAM_ISP_HW_VFE_IN_RDI0 &&
		mux_res->res_id <= CAM_ISP_HW_VFE_IN_RDI3) {
		mux_res->res_state = CAM_ISP_RESOURCE_STATE_STREAMING;
		rc = 0;
	} else {
		pr_err("Invalid res id:%d\n", mux_res->res_id);
		rc = -EINVAL;