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Commit 9cd24451 authored by Mohammed Shafi Shajakhan's avatar Mohammed Shafi Shajakhan Committed by Kalle Valo
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ath10k: remove duplicate and unused rx rate flags 



All these flags are not used and their use is completely
covered by 'ath10k_hw_rate_ofdm', 'ath10k_hw_rate_cck',
and RX_PPDU_START_RATE_FLAG

Signed-off-by: default avatarMohammed Shafi Shajakhan <mohammed@qti.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent dc73787b

drivers/net/wireless/ath/ath10k/rx_desc.h

+0 −39
Original line number Diff line number Diff line
@@ -656,26 +656,6 @@ struct rx_msdu_end { 
 *		Reserved: HW should fill with zero.  FW should ignore.

 */



#define RX_PPDU_START_SIG_RATE_SELECT_OFDM 0

#define RX_PPDU_START_SIG_RATE_SELECT_CCK  1



#define RX_PPDU_START_SIG_RATE_OFDM_48 0

#define RX_PPDU_START_SIG_RATE_OFDM_24 1

#define RX_PPDU_START_SIG_RATE_OFDM_12 2

#define RX_PPDU_START_SIG_RATE_OFDM_6  3

#define RX_PPDU_START_SIG_RATE_OFDM_54 4

#define RX_PPDU_START_SIG_RATE_OFDM_36 5

#define RX_PPDU_START_SIG_RATE_OFDM_18 6

#define RX_PPDU_START_SIG_RATE_OFDM_9  7



#define RX_PPDU_START_SIG_RATE_CCK_LP_11  0

#define RX_PPDU_START_SIG_RATE_CCK_LP_5_5 1

#define RX_PPDU_START_SIG_RATE_CCK_LP_2   2

#define RX_PPDU_START_SIG_RATE_CCK_LP_1   3

#define RX_PPDU_START_SIG_RATE_CCK_SP_11  4

#define RX_PPDU_START_SIG_RATE_CCK_SP_5_5 5

#define RX_PPDU_START_SIG_RATE_CCK_SP_2   6



#define HTT_RX_PPDU_START_PREAMBLE_LEGACY        0x04

#define HTT_RX_PPDU_START_PREAMBLE_HT            0x08

#define HTT_RX_PPDU_START_PREAMBLE_HT_WITH_TXBF  0x09
@@ -711,25 +691,6 @@ struct rx_msdu_end { 
/* No idea what this flag means. It seems to be always set in rate. */

#define RX_PPDU_START_RATE_FLAG BIT(3)



enum rx_ppdu_start_rate {

	RX_PPDU_START_RATE_OFDM_48M = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_OFDM_48M,

	RX_PPDU_START_RATE_OFDM_24M = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_OFDM_24M,

	RX_PPDU_START_RATE_OFDM_12M = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_OFDM_12M,

	RX_PPDU_START_RATE_OFDM_6M  = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_OFDM_6M,

	RX_PPDU_START_RATE_OFDM_54M = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_OFDM_54M,

	RX_PPDU_START_RATE_OFDM_36M = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_OFDM_36M,

	RX_PPDU_START_RATE_OFDM_18M = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_OFDM_18M,

	RX_PPDU_START_RATE_OFDM_9M  = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_OFDM_9M,



	RX_PPDU_START_RATE_CCK_LP_11M  = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_CCK_LP_11M,

	RX_PPDU_START_RATE_CCK_LP_5_5M = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_CCK_LP_5_5M,

	RX_PPDU_START_RATE_CCK_LP_2M   = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_CCK_LP_2M,

	RX_PPDU_START_RATE_CCK_LP_1M   = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_CCK_LP_1M,

	RX_PPDU_START_RATE_CCK_SP_11M  = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_CCK_SP_11M,

	RX_PPDU_START_RATE_CCK_SP_5_5M = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_CCK_SP_5_5M,

	RX_PPDU_START_RATE_CCK_SP_2M   = RX_PPDU_START_RATE_FLAG | ATH10K_HW_RATE_CCK_SP_2M,

};



struct rx_ppdu_start {

	struct {

		u8 pri20_mhz;