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Commit 9bc7ebcb authored by John Crispin's avatar John Crispin Committed by Ralf Baechle
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MIPS: lantiq: add missing spi clock on falcon SoC 



Signed-off-by: default avatarThomas Langer <thomas.langer@lantiq.com>
Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8050/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent eb5dbd22
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