Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit eb5dbd22 authored by John Crispin's avatar John Crispin Committed by Ralf Baechle
Browse files

MIPS: lantiq: the detection of the gpe clock is broken 



The code to detect unfused SoCs was broken due to missing register masking.

Signed-off-by: default avatarThomas Langer <thomas.langer@lantiq.com>
Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8049/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 17327862

arch/mips/lantiq/falcon/sysctrl.c

+4 −5
Original line number Diff line number Diff line
@@ -147,12 +147,11 @@ static void falcon_gpe_enable(void) 
	if (status & (1 << (GPPC_OFFSET + 1)))

		return;



	if (status_r32(STATUS_CONFIG) == 0)

		freq = 1; /* use 625MHz on unfused chip */

	else

	freq = (status_r32(STATUS_CONFIG) &

		GPEFREQ_MASK) >>

		GPEFREQ_OFFSET;

	if (freq == 0)

		freq = 1; /* use 625MHz on unfused chip */



	/* apply new frequency */

	sysctl_w32_mask(SYSCTL_SYS1, 7 << (GPPC_OFFSET + 1),