Merge "Merge android-4.9.215(60fbe70) into msm-4.9" (9b68f264) · Commits · e / devices / android_kernel_fairphone_FP3

Makefile

+1 −1

Original line number	Diff line number	Diff line
		VERSION = 4
		PATCHLEVEL = 9
		SUBLEVEL = 214
		SUBLEVEL = 215
		EXTRAVERSION =
		NAME = Roaring Lionus

arch/arm/Kconfig

+1 −1

Original line number	Diff line number	Diff line
		@@ -2130,7 +2130,7 @@ config XIP_PHYS_ADDR
		config KEXEC
		bool "Kexec system call (EXPERIMENTAL)"
		depends on (!SMP \|\| PM_SLEEP_SMP)
		depends on !CPU_V7M
		depends on MMU
		select KEXEC_CORE
		help
		kexec is a system call that implements the ability to shutdown your

arch/arm/boot/dts/r8a7779.dtsi

+8 −0

Original line number	Diff line number	Diff line
		@@ -67,6 +67,14 @@
		<0xf0000100 0x100>;
		};

		timer@f0000200 {
		compatible = "arm,cortex-a9-global-timer";
		reg = <0xf0000200 0x100>;
		interrupts = <GIC_PPI 11
		(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_EDGE_RISING)>;
		clocks = <&cpg_clocks R8A7779_CLK_ZS>;
		};

		timer@f0000600 {
		compatible = "arm,cortex-a9-twd-timer";
		reg = <0xf0000600 0x20>;

arch/arm64/include/asm/alternative.h

+21 −11

Original line number	Diff line number	Diff line
		@@ -29,13 +29,16 @@ typedef void (alternative_cb_t)(struct alt_instr alt,
		void __init apply_alternatives_all(void);
		void apply_alternatives(void *start, size_t length);

		#define ALTINSTR_ENTRY(feature,cb) \
		#define ALTINSTR_ENTRY(feature) \
		" .word 661b - .\n" /* label */ \
		" .if " __stringify(cb) " == 0\n" \
		" .word 663f - .\n" /* new instruction */ \
		" .else\n" \
		" .hword " __stringify(feature) "\n" /* feature bit */ \
		" .byte 662b-661b\n" /* source len */ \
		" .byte 664f-663f\n" /* replacement len */

		#define ALTINSTR_ENTRY_CB(feature, cb) \
		" .word 661b - .\n" /* label */ \
		" .word " __stringify(cb) "- .\n" /* callback */ \
		" .endif\n" \
		" .hword " __stringify(feature) "\n" /* feature bit */ \
		" .byte 662b-661b\n" /* source len */ \
		" .byte 664f-663f\n" /* replacement len */
		@@ -56,15 +59,14 @@ void apply_alternatives(void *start, size_t length);
		*
		* Alternatives with callbacks do not generate replacement instructions.
		*/
		#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled, cb) \
		#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
		".if "__stringify(cfg_enabled)" == 1\n" \
		"661:\n\t" \
		oldinstr "\n" \
		"662:\n" \
		".pushsection .altinstructions,\"a\"\n" \
		ALTINSTR_ENTRY(feature,cb) \
		ALTINSTR_ENTRY(feature) \
		".popsection\n" \
		" .if " __stringify(cb) " == 0\n" \
		".pushsection .altinstr_replacement, \"a\"\n" \
		"663:\n\t" \
		newinstr "\n" \
		@@ -72,17 +74,25 @@ void apply_alternatives(void *start, size_t length);
		".popsection\n\t" \
		".org . - (664b-663b) + (662b-661b)\n\t" \
		".org . - (662b-661b) + (664b-663b)\n" \
		".else\n\t" \
		".endif\n"

		#define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \
		".if "__stringify(cfg_enabled)" == 1\n" \
		"661:\n\t" \
		oldinstr "\n" \
		"662:\n" \
		".pushsection .altinstructions,\"a\"\n" \
		ALTINSTR_ENTRY_CB(feature, cb) \
		".popsection\n" \
		"663:\n\t" \
		"664:\n\t" \
		".endif\n" \
		".endif\n"

		#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
		__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg), 0)
		__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))

		#define ALTERNATIVE_CB(oldinstr, cb) \
		__ALTERNATIVE_CFG(oldinstr, "NOT_AN_INSTRUCTION", ARM64_CB_PATCH, 1, cb)
		__ALTERNATIVE_CFG_CB(oldinstr, ARM64_CB_PATCH, 1, cb)
		#else

		#include <asm/assembler.h>

arch/microblaze/kernel/cpu/cache.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -92,6 +92,7 @@ static inline void __disable_dcache_nomsr(void)
		#define CACHE_LOOP_LIMITS(start, end, cache_line_length, cache_size) \
		do { \
		int align = ~(cache_line_length - 1); \
		if (start < UINT_MAX - cache_size) \
		end = min(start + cache_size, end); \
		start &= align; \
		} while (0)