Merge "Revert "usb: composite: Draw 900mA on USB resume if speed is super-speed"" (094cfe26) · Commits · e / devices / android_kernel_fairphone_FP3

Makefile

+1 −1

Original line number	Diff line number	Diff line
		VERSION = 4
		PATCHLEVEL = 9
		SUBLEVEL = 213
		SUBLEVEL = 214
		EXTRAVERSION =
		NAME = Roaring Lionus

arch/arc/boot/dts/axs10x_mb.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -63,6 +63,7 @@
		interrupt-names = "macirq";
		phy-mode = "rgmii";
		snps,pbl = < 32 >;
		snps,multicast-filter-bins = <256>;
		clocks = <&apbclk>;
		clock-names = "stmmaceth";
		max-speed = <100>;

arch/arm/boot/dts/sama5d3.dtsi

+14 −14

Original line number	Diff line number	Diff line
		@@ -1109,49 +1109,49 @@
		usart0_clk: usart0_clk {
		#clock-cells = <0>;
		reg = <12>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		usart1_clk: usart1_clk {
		#clock-cells = <0>;
		reg = <13>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		usart2_clk: usart2_clk {
		#clock-cells = <0>;
		reg = <14>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		usart3_clk: usart3_clk {
		#clock-cells = <0>;
		reg = <15>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		uart0_clk: uart0_clk {
		#clock-cells = <0>;
		reg = <16>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		twi0_clk: twi0_clk {
		reg = <18>;
		#clock-cells = <0>;
		atmel,clk-output-range = <0 16625000>;
		atmel,clk-output-range = <0 41500000>;
		};

		twi1_clk: twi1_clk {
		#clock-cells = <0>;
		reg = <19>;
		atmel,clk-output-range = <0 16625000>;
		atmel,clk-output-range = <0 41500000>;
		};

		twi2_clk: twi2_clk {
		#clock-cells = <0>;
		reg = <20>;
		atmel,clk-output-range = <0 16625000>;
		atmel,clk-output-range = <0 41500000>;
		};

		mci0_clk: mci0_clk {
		@@ -1167,19 +1167,19 @@
		spi0_clk: spi0_clk {
		#clock-cells = <0>;
		reg = <24>;
		atmel,clk-output-range = <0 133000000>;
		atmel,clk-output-range = <0 166000000>;
		};

		spi1_clk: spi1_clk {
		#clock-cells = <0>;
		reg = <25>;
		atmel,clk-output-range = <0 133000000>;
		atmel,clk-output-range = <0 166000000>;
		};

		tcb0_clk: tcb0_clk {
		#clock-cells = <0>;
		reg = <26>;
		atmel,clk-output-range = <0 133000000>;
		atmel,clk-output-range = <0 166000000>;
		};

		pwm_clk: pwm_clk {
		@@ -1190,7 +1190,7 @@
		adc_clk: adc_clk {
		#clock-cells = <0>;
		reg = <29>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		dma0_clk: dma0_clk {
		@@ -1221,13 +1221,13 @@
		ssc0_clk: ssc0_clk {
		#clock-cells = <0>;
		reg = <38>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		ssc1_clk: ssc1_clk {
		#clock-cells = <0>;
		reg = <39>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		sha_clk: sha_clk {

arch/arm/boot/dts/sama5d3_can.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -37,13 +37,13 @@
		can0_clk: can0_clk {
		#clock-cells = <0>;
		reg = <40>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};

		can1_clk: can1_clk {
		#clock-cells = <0>;
		reg = <41>;
		atmel,clk-output-range = <0 66000000>;
		atmel,clk-output-range = <0 83000000>;
		};
		};
		};

arch/arm/boot/dts/sama5d3_tcb1.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -23,6 +23,7 @@
		tcb1_clk: tcb1_clk {
		#clock-cells = <0>;
		reg = <27>;
		atmel,clk-output-range = <0 166000000>;
		};
		};
		};