Loading asoc/codecs/sdm660_cdc/msm-digital-cdc.c +41 −41 Original line number Diff line number Diff line Loading @@ -216,17 +216,20 @@ static int msm_dig_cdc_codec_config_compander(struct snd_soc_codec *codec, int interp_n, int event) { struct msm_dig_priv *dig_cdc = snd_soc_codec_get_drvdata(codec); int comp_ch_bits_set = 0x03; dev_dbg(codec->dev, "%s: event %d shift %d, enabled %d\n", __func__, event, interp_n, dig_cdc->comp_enabled[interp_n]); /* compander is not enabled */ if (!dig_cdc->comp_enabled[interp_n]) /* compander is invalid */ if (dig_cdc->comp_enabled[interp_n] != COMPANDER_1 && dig_cdc->comp_enabled[interp_n]) { dev_dbg(codec->dev, "%s: Invalid compander %d\n", __func__, dig_cdc->comp_enabled[interp_n]); return 0; } switch (dig_cdc->comp_enabled[interp_n]) { case COMPANDER_1: if (SND_SOC_DAPM_EVENT_ON(event)) { /* Enable Compander Clock */ snd_soc_update_bits(codec, Loading Loading @@ -255,21 +258,18 @@ static int msm_dig_cdc_codec_config_compander(struct snd_soc_codec *codec, if (dig_cdc->codec_hph_comp_gpio) dig_cdc->codec_hph_comp_gpio(0, codec); snd_soc_update_bits(codec, MSM89XX_CDC_CORE_COMP0_B2_CTL, 0x0F, 0x05); snd_soc_update_bits(codec, MSM89XX_CDC_CORE_COMP0_B1_CTL, 1 << interp_n, 0); comp_ch_bits_set = snd_soc_read(codec, MSM89XX_CDC_CORE_COMP0_B1_CTL); if ((comp_ch_bits_set & 0x03) == 0x00) { snd_soc_update_bits(codec, MSM89XX_CDC_CORE_COMP0_B2_CTL, 0x0F, 0x05); snd_soc_update_bits(codec, MSM89XX_CDC_CORE_CLK_RX_B2_CTL, 0x01, 0x00); } break; default: dev_dbg(codec->dev, "%s: Invalid compander %d\n", __func__, dig_cdc->comp_enabled[interp_n]); break; }; } return 0; } Loading Loading
asoc/codecs/sdm660_cdc/msm-digital-cdc.c +41 −41 Original line number Diff line number Diff line Loading @@ -216,17 +216,20 @@ static int msm_dig_cdc_codec_config_compander(struct snd_soc_codec *codec, int interp_n, int event) { struct msm_dig_priv *dig_cdc = snd_soc_codec_get_drvdata(codec); int comp_ch_bits_set = 0x03; dev_dbg(codec->dev, "%s: event %d shift %d, enabled %d\n", __func__, event, interp_n, dig_cdc->comp_enabled[interp_n]); /* compander is not enabled */ if (!dig_cdc->comp_enabled[interp_n]) /* compander is invalid */ if (dig_cdc->comp_enabled[interp_n] != COMPANDER_1 && dig_cdc->comp_enabled[interp_n]) { dev_dbg(codec->dev, "%s: Invalid compander %d\n", __func__, dig_cdc->comp_enabled[interp_n]); return 0; } switch (dig_cdc->comp_enabled[interp_n]) { case COMPANDER_1: if (SND_SOC_DAPM_EVENT_ON(event)) { /* Enable Compander Clock */ snd_soc_update_bits(codec, Loading Loading @@ -255,21 +258,18 @@ static int msm_dig_cdc_codec_config_compander(struct snd_soc_codec *codec, if (dig_cdc->codec_hph_comp_gpio) dig_cdc->codec_hph_comp_gpio(0, codec); snd_soc_update_bits(codec, MSM89XX_CDC_CORE_COMP0_B2_CTL, 0x0F, 0x05); snd_soc_update_bits(codec, MSM89XX_CDC_CORE_COMP0_B1_CTL, 1 << interp_n, 0); comp_ch_bits_set = snd_soc_read(codec, MSM89XX_CDC_CORE_COMP0_B1_CTL); if ((comp_ch_bits_set & 0x03) == 0x00) { snd_soc_update_bits(codec, MSM89XX_CDC_CORE_COMP0_B2_CTL, 0x0F, 0x05); snd_soc_update_bits(codec, MSM89XX_CDC_CORE_CLK_RX_B2_CTL, 0x01, 0x00); } break; default: dev_dbg(codec->dev, "%s: Invalid compander %d\n", __func__, dig_cdc->comp_enabled[interp_n]); break; }; } return 0; } Loading