Loading drivers/gpu/drm/msm/sde/sde_hw_ctl.c +1 −0 Original line number Original line Diff line number Diff line Loading @@ -357,6 +357,7 @@ static void sde_hw_ctl_clear_all_blendstages(struct sde_hw_ctl *ctx) SDE_REG_WRITE(c, CTL_LAYER(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT2(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT2(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT3(LM_0 + i), 0); } } } } Loading Loading
drivers/gpu/drm/msm/sde/sde_hw_ctl.c +1 −0 Original line number Original line Diff line number Diff line Loading @@ -357,6 +357,7 @@ static void sde_hw_ctl_clear_all_blendstages(struct sde_hw_ctl *ctx) SDE_REG_WRITE(c, CTL_LAYER(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT2(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT2(LM_0 + i), 0); SDE_REG_WRITE(c, CTL_LAYER_EXT3(LM_0 + i), 0); } } } } Loading