drm/msm/sde: fix clearing of multi-rect blendstages

The SmartDMA 2.0 implementation added programing of EXT3 registers
when setting up blendstages for RECT1 but this setting never gets
cleared.  This patch ensures this register is cleared to 0 at the
appropriate time.

Change-Id: I4bdb6530684d1de86843f886fe4ba8b50311b1c8
Signed-off-by: Steve Cohen <cohens@codeaurora.org>