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Commit 8ba4b3b9 authored by Thierry Reding's avatar Thierry Reding Committed by Peter De Schrijver
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clk: tegra: Do not print errors for clk_round_rate()



clk_round_rate() can be used by drivers to determine whether or not a
frequency is supported by the clock. The current Tegra clock driver
outputs an error message and a stacktrace when the requested rate isn't
supported. That's fine for clk_set_rate(), but it's confusing when all
the driver does is query whether or not a frequency is supported.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 39409aa4
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+3 −6
Original line number Diff line number Diff line
@@ -435,9 +435,6 @@ static int _calc_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg,
	if (cfg->m > divm_max(pll) || cfg->n > divn_max(pll) ||
	    (1 << p_div) > divp_max(pll)
	    || cfg->output_rate > pll->params->vco_max) {
		pr_err("%s: Failed to set %s rate %lu\n",
		       __func__, __clk_get_name(hw->clk), rate);
		WARN_ON(1);
		return -EINVAL;
	}

@@ -584,6 +581,8 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,

	if (_get_table_rate(hw, &cfg, rate, parent_rate) &&
	    _calc_rate(hw, &cfg, rate, parent_rate)) {
		pr_err("%s: Failed to set %s rate %lu\n", __func__,
		       __clk_get_name(hw->clk), rate);
		WARN_ON(1);
		return -EINVAL;
	}
@@ -615,10 +614,8 @@ static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
		return __clk_get_rate(hw->clk);

	if (_get_table_rate(hw, &cfg, rate, *prate) &&
	    _calc_rate(hw, &cfg, rate, *prate)) {
		WARN_ON(1);
	    _calc_rate(hw, &cfg, rate, *prate))
		return -EINVAL;
	}

	return cfg.output_rate;
}