clk: tegra: Have EMC clock implement determine_rate()

 * safer since things have EMC rate floors. Also don't touch parent_rate

 * since we don't want the CCF to play with our parent clocks.

 */

static long emc_round_rate(struct clk_hw *hw, unsigned long rate,

		    unsigned long *parent_rate)

static long emc_determine_rate(struct clk_hw *hw, unsigned long rate,

			       unsigned long min_rate,

			       unsigned long max_rate,

			       unsigned long *best_parent_rate,

			       struct clk_hw **best_parent_hw)

{

	struct tegra_clk_emc *tegra;

	u8 ram_code = tegra_read_ram_code();

		timing = tegra->timings + i;

		if (timing->rate > max_rate) {

			i = min(i, 1);

			return tegra->timings[i - 1].rate;

		}

		if (timing->rate < min_rate)

			continue;

		if (timing->rate >= rate)

			return timing->rate;

	}

static const struct clk_ops tegra_clk_emc_ops = {

	.recalc_rate = emc_recalc_rate,

	.round_rate = emc_round_rate,

	.determine_rate = emc_determine_rate,

	.set_rate = emc_set_rate,

	.get_parent = emc_get_parent,

};