Commit 88664300 authored Jun 09, 2020 by Rama Krishna Phani A

msm: ep_pcie: Vote for pipe clk for early init case



Few usecases will have early init feature enabled where
PCIe link is established in PBL. In such cases EP PCIe
driver is not voting for pipe clk but unvoting it as part of
PCIe link suspend, causing unbalanced voting for that clk.

Update logic to vote for PCIe pipe clk for early init case.

Change-Id: Ibb26e88b1b3fb4426a2c03bf3031633e3fb4639f
Signed-off-by: Rama Krishna Phani A <rphani@codeaurora.org>

parent bcec8f77

drivers/platform/msm/ep_pcie/ep_pcie_core.c

+9 −0

Original line number	Diff line number	Diff line
		@@ -1403,6 +1403,15 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt)
		ep_pcie_core_init(dev, true);
		dev->link_status = EP_PCIE_LINK_UP;
		dev->l23_ready = false;

		/* enable pipe clock for early link init case*/
		ret = ep_pcie_pipe_clk_init(dev);
		if (ret) {
		EP_PCIE_ERR(dev,
		"PCIe V%d: failed to enable pipe clock\n",
		dev->rev);
		goto pipe_clk_fail;
		}
		goto checkbme;
		} else {
		ltssm_en = readl_relaxed(dev->parf