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Commit 8233008f authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull PCI fixes from Bjorn Helgaas:

 - Update MAINTAINERS for Intel VMD driver filename

 - Update Rockchip rk3399 host bridge driver DTS and resets

 - Fix ROM shadow problem that made some video device initialization
   fail

* tag 'pci-v4.9-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: VMD: Update filename to reflect move
  arm64: dts: rockchip: add three new resets for rk3399 PCIe controller
  PCI: rockchip: Add three new resets as required properties
  PCI: Don't attempt to claim shadow copies of ROM
parents 4fb68f97 bc79c985
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+8 −3
Original line number Original line Diff line number Diff line
@@ -26,13 +26,16 @@ Required properties:
	- "sys"
	- "sys"
	- "legacy"
	- "legacy"
	- "client"
	- "client"
- resets: Must contain five entries for each entry in reset-names.
- resets: Must contain seven entries for each entry in reset-names.
	   See ../reset/reset.txt for details.
	   See ../reset/reset.txt for details.
- reset-names: Must include the following names
- reset-names: Must include the following names
	- "core"
	- "core"
	- "mgmt"
	- "mgmt"
	- "mgmt-sticky"
	- "mgmt-sticky"
	- "pipe"
	- "pipe"
	- "pm"
	- "aclk"
	- "pclk"
- pinctrl-names : The pin control state names
- pinctrl-names : The pin control state names
- pinctrl-0: The "default" pinctrl state
- pinctrl-0: The "default" pinctrl state
- #interrupt-cells: specifies the number of cells needed to encode an
- #interrupt-cells: specifies the number of cells needed to encode an
@@ -86,8 +89,10 @@ pcie0: pcie@f8000000 {
	reg = <0x0 0xf8000000 0x0 0x2000000>, <0x0 0xfd000000 0x0 0x1000000>;
	reg = <0x0 0xf8000000 0x0 0x2000000>, <0x0 0xfd000000 0x0 0x1000000>;
	reg-names = "axi-base", "apb-base";
	reg-names = "axi-base", "apb-base";
	resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
	resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
		 <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>;
		 <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> ,
	reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
		 <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>;
	reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
		      "pm", "pclk", "aclk";
	phys = <&pcie_phy>;
	phys = <&pcie_phy>;
	phy-names = "pcie-phy";
	phy-names = "pcie-phy";
	pinctrl-names = "default";
	pinctrl-names = "default";
+1 −1
Original line number Original line Diff line number Diff line
@@ -9335,7 +9335,7 @@ PCI DRIVER FOR INTEL VOLUME MANAGEMENT DEVICE (VMD)
M:	Keith Busch <keith.busch@intel.com>
M:	Keith Busch <keith.busch@intel.com>
L:	linux-pci@vger.kernel.org
L:	linux-pci@vger.kernel.org
S:	Supported
S:	Supported
F:	arch/x86/pci/vmd.c
F:	drivers/pci/host/vmd.c


PCIE DRIVER FOR ST SPEAR13XX
PCIE DRIVER FOR ST SPEAR13XX
M:	Pratyush Anand <pratyush.anand@gmail.com>
M:	Pratyush Anand <pratyush.anand@gmail.com>
+5 −2
Original line number Original line Diff line number Diff line
@@ -300,8 +300,11 @@
		ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
		ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
			  0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
			  0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
		resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
		resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
			 <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>;
			 <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
		reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
			 <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
			 <&cru SRST_A_PCIE>;
		reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
			      "pm", "pclk", "aclk";
		status = "disabled";
		status = "disabled";


		pcie0_intc: interrupt-controller {
		pcie0_intc: interrupt-controller {
+62 −0
Original line number Original line Diff line number Diff line
@@ -190,6 +190,9 @@ struct rockchip_pcie {
	struct	reset_control *mgmt_rst;
	struct	reset_control *mgmt_rst;
	struct	reset_control *mgmt_sticky_rst;
	struct	reset_control *mgmt_sticky_rst;
	struct	reset_control *pipe_rst;
	struct	reset_control *pipe_rst;
	struct	reset_control *pm_rst;
	struct	reset_control *aclk_rst;
	struct	reset_control *pclk_rst;
	struct	clk *aclk_pcie;
	struct	clk *aclk_pcie;
	struct	clk *aclk_perf_pcie;
	struct	clk *aclk_perf_pcie;
	struct	clk *hclk_pcie;
	struct	clk *hclk_pcie;
@@ -408,6 +411,44 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)


	gpiod_set_value(rockchip->ep_gpio, 0);
	gpiod_set_value(rockchip->ep_gpio, 0);


	err = reset_control_assert(rockchip->aclk_rst);
	if (err) {
		dev_err(dev, "assert aclk_rst err %d\n", err);
		return err;
	}

	err = reset_control_assert(rockchip->pclk_rst);
	if (err) {
		dev_err(dev, "assert pclk_rst err %d\n", err);
		return err;
	}

	err = reset_control_assert(rockchip->pm_rst);
	if (err) {
		dev_err(dev, "assert pm_rst err %d\n", err);
		return err;
	}

	udelay(10);

	err = reset_control_deassert(rockchip->pm_rst);
	if (err) {
		dev_err(dev, "deassert pm_rst err %d\n", err);
		return err;
	}

	err = reset_control_deassert(rockchip->aclk_rst);
	if (err) {
		dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err);
		return err;
	}

	err = reset_control_deassert(rockchip->pclk_rst);
	if (err) {
		dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err);
		return err;
	}

	err = phy_init(rockchip->phy);
	err = phy_init(rockchip->phy);
	if (err < 0) {
	if (err < 0) {
		dev_err(dev, "fail to init phy, err %d\n", err);
		dev_err(dev, "fail to init phy, err %d\n", err);
@@ -781,6 +822,27 @@ static int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
		return PTR_ERR(rockchip->pipe_rst);
		return PTR_ERR(rockchip->pipe_rst);
	}
	}


	rockchip->pm_rst = devm_reset_control_get(dev, "pm");
	if (IS_ERR(rockchip->pm_rst)) {
		if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER)
			dev_err(dev, "missing pm reset property in node\n");
		return PTR_ERR(rockchip->pm_rst);
	}

	rockchip->pclk_rst = devm_reset_control_get(dev, "pclk");
	if (IS_ERR(rockchip->pclk_rst)) {
		if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER)
			dev_err(dev, "missing pclk reset property in node\n");
		return PTR_ERR(rockchip->pclk_rst);
	}

	rockchip->aclk_rst = devm_reset_control_get(dev, "aclk");
	if (IS_ERR(rockchip->aclk_rst)) {
		if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER)
			dev_err(dev, "missing aclk reset property in node\n");
		return PTR_ERR(rockchip->aclk_rst);
	}

	rockchip->ep_gpio = devm_gpiod_get(dev, "ep", GPIOD_OUT_HIGH);
	rockchip->ep_gpio = devm_gpiod_get(dev, "ep", GPIOD_OUT_HIGH);
	if (IS_ERR(rockchip->ep_gpio)) {
	if (IS_ERR(rockchip->ep_gpio)) {
		dev_err(dev, "missing ep-gpios property in node\n");
		dev_err(dev, "missing ep-gpios property in node\n");
+8 −0
Original line number Original line Diff line number Diff line
@@ -121,6 +121,14 @@ int pci_claim_resource(struct pci_dev *dev, int resource)
		return -EINVAL;
		return -EINVAL;
	}
	}


	/*
	 * If we have a shadow copy in RAM, the PCI device doesn't respond
	 * to the shadow range, so we don't need to claim it, and upstream
	 * bridges don't need to route the range to the device.
	 */
	if (res->flags & IORESOURCE_ROM_SHADOW)
		return 0;

	root = pci_find_parent_resource(dev, res);
	root = pci_find_parent_resource(dev, res);
	if (!root) {
	if (!root) {
		dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",
		dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",